forked from OSchip/llvm-project
73 lines
2.1 KiB
ArmAsm
73 lines
2.1 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=i686-unknown-unknown -mcpu=atom -instruction-tables < %s | FileCheck %s
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aaa
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aad
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aad $7
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aam
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aam $7
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aas
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bound %bx, (%eax)
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bound %ebx, (%eax)
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daa
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das
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into
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leave
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salc
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 1 13 6.50 aaa
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# CHECK-NEXT: 1 7 3.50 aad
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# CHECK-NEXT: 1 7 3.50 aad $7
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# CHECK-NEXT: 1 21 10.50 aam
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# CHECK-NEXT: 1 21 10.50 aam $7
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# CHECK-NEXT: 1 13 6.50 aas
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# CHECK-NEXT: 1 11 5.50 U bound %bx, (%eax)
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# CHECK-NEXT: 1 11 5.50 U bound %ebx, (%eax)
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# CHECK-NEXT: 1 18 9.00 daa
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# CHECK-NEXT: 1 20 10.00 das
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# CHECK-NEXT: 1 6 3.00 U into
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# CHECK-NEXT: 1 2 1.00 * leave
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# CHECK-NEXT: 1 1 0.50 U salc
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# CHECK: Resources:
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# CHECK-NEXT: [0] - AtomPort0
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# CHECK-NEXT: [1] - AtomPort1
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1]
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# CHECK-NEXT: 75.50 75.50
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] Instructions:
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# CHECK-NEXT: 6.50 6.50 aaa
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# CHECK-NEXT: 3.50 3.50 aad
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# CHECK-NEXT: 3.50 3.50 aad $7
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# CHECK-NEXT: 10.50 10.50 aam
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# CHECK-NEXT: 10.50 10.50 aam $7
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# CHECK-NEXT: 6.50 6.50 aas
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# CHECK-NEXT: 5.50 5.50 bound %bx, (%eax)
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# CHECK-NEXT: 5.50 5.50 bound %ebx, (%eax)
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# CHECK-NEXT: 9.00 9.00 daa
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# CHECK-NEXT: 10.00 10.00 das
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# CHECK-NEXT: 3.00 3.00 into
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# CHECK-NEXT: 1.00 1.00 leave
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# CHECK-NEXT: 0.50 0.50 salc
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