forked from OSchip/llvm-project
172 lines
5.7 KiB
YAML
172 lines
5.7 KiB
YAML
# RUN: llc -run-pass si-insert-waits -march=amdgcn -mcpu=tahiti -o - %s | FileCheck %s
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--- |
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define amdgpu_kernel void @vccz_corrupt_workaround(float %cond, i32 addrspace(1)* %out) #0 {
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entry:
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%cmp0 = fcmp oeq float %cond, 0.000000e+00
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br i1 %cmp0, label %if, label %else, !structurizecfg.uniform !0, !amdgpu.uniform !0
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else: ; preds = %entry
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store volatile i32 100, i32 addrspace(1)* undef
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br label %done, !structurizecfg.uniform !0
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if: ; preds = %entry
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store volatile i32 9, i32 addrspace(1)* undef
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br label %done, !structurizecfg.uniform !0
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done: ; preds = %if, %else
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%value = phi i32 [ 0, %if ], [ 1, %else ]
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store i32 %value, i32 addrspace(1)* %out
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ret void
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}
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define amdgpu_kernel void @vccz_corrupt_undef_vcc(float %cond, i32 addrspace(1)* %out) #0 {
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entry:
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br i1 undef, label %if, label %else, !structurizecfg.uniform !0, !amdgpu.uniform !0
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else: ; preds = %entry
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store volatile i32 100, i32 addrspace(1)* undef
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br label %done, !structurizecfg.uniform !0
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if: ; preds = %entry
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store volatile i32 9, i32 addrspace(1)* undef
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br label %done, !structurizecfg.uniform !0
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done: ; preds = %if, %else
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%value = phi i32 [ 0, %if ], [ 1, %else ]
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store i32 %value, i32 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { readnone }
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!0 = !{}
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...
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---
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# CHECK-LABEL: name: vccz_corrupt_workaround
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# CHECK: %vcc = V_CMP_EQ_F32
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# CHECK-NEXT: %vcc = S_MOV_B64 %vcc
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# CHECK-NEXT: S_CBRANCH_VCCZ %bb.2.else, implicit killed %vcc
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name: vccz_corrupt_workaround
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '%sgpr0_sgpr1' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.entry:
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liveins: %sgpr0_sgpr1
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%sgpr2 = S_LOAD_DWORD_IMM %sgpr0_sgpr1, 9, 0 :: (non-temporal dereferenceable invariant load 4 from `float addrspace(2)* undef`)
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%sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed %sgpr0_sgpr1, 11, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`)
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%sgpr7 = S_MOV_B32 61440
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%sgpr6 = S_MOV_B32 -1
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%vcc = V_CMP_EQ_F32_e64 0, 0, 0, %sgpr2, 0, 0, implicit %exec
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S_CBRANCH_VCCZ %bb.1.else, implicit killed %vcc
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bb.2.if:
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liveins: %sgpr6, %sgpr7, %sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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%vgpr0 = V_MOV_B32_e32 9, implicit %exec
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BUFFER_STORE_DWORD_OFFSET killed %vgpr0, killed %sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `i32 addrspace(1)* undef`)
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%vgpr0 = V_MOV_B32_e32 0, implicit %exec
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S_BRANCH %bb.3.done
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bb.1.else:
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liveins: %sgpr6, %sgpr7, %sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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%vgpr0 = V_MOV_B32_e32 100, implicit %exec
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BUFFER_STORE_DWORD_OFFSET killed %vgpr0, killed %sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `i32 addrspace(1)* undef`)
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%vgpr0 = V_MOV_B32_e32 1, implicit %exec
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bb.3.done:
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liveins: %vgpr0, %sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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%sgpr3 = S_MOV_B32 61440
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%sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed %vgpr0, killed %sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit %exec :: (store 4 into %ir.out)
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S_ENDPGM
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...
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---
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# CHECK-LABEL: name: vccz_corrupt_undef_vcc
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# CHECK: S_WAITCNT
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# CHECK-NEXT: S_CBRANCH_VCCZ %bb.2.else, implicit undef %vcc
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name: vccz_corrupt_undef_vcc
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '%sgpr0_sgpr1' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.entry:
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liveins: %sgpr0_sgpr1
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%sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed %sgpr0_sgpr1, 11, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`)
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%sgpr7 = S_MOV_B32 61440
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%sgpr6 = S_MOV_B32 -1
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S_CBRANCH_VCCZ %bb.1.else, implicit undef %vcc
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bb.2.if:
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liveins: %sgpr6, %sgpr7, %sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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%vgpr0 = V_MOV_B32_e32 9, implicit %exec
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BUFFER_STORE_DWORD_OFFSET killed %vgpr0, killed %sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `i32 addrspace(1)* undef`)
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%vgpr0 = V_MOV_B32_e32 0, implicit %exec
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S_BRANCH %bb.3.done
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bb.1.else:
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liveins: %sgpr6, %sgpr7, %sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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%vgpr0 = V_MOV_B32_e32 100, implicit %exec
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BUFFER_STORE_DWORD_OFFSET killed %vgpr0, killed %sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `i32 addrspace(1)* undef`)
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%vgpr0 = V_MOV_B32_e32 1, implicit %exec
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bb.3.done:
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liveins: %vgpr0, %sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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%sgpr3 = S_MOV_B32 61440
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%sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed %vgpr0, killed %sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit %exec :: (store 4 into %ir.out)
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S_ENDPGM
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...
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