llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc
Thomas Lively efe7f5ede0 [WebAssembly][NFC] Refactor SIMD load/store tablegen defs
Introduce `Vec` records, each bundling all information related to a single SIMD
lane interpretation. This lets TableGen definitions take a single Vec parameter
from which they can extract information rather than taking multiple redundant
parameters. This commit refactors all of the SIMD load and store instruction
definitions to use the new `Vec`s. Subsequent commits will similarly refactor
additional instruction definitions.

Differential Revision: https://reviews.llvm.org/D93660
2020-12-22 20:06:12 -08:00
..
CMakeLists.txt llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
WebAssemblyAsmBackend.cpp [MC] Default MCAsmBackend::mayNeedRelaxation() to false 2020-08-02 22:13:59 -07:00
WebAssemblyFixupKinds.h [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
WebAssemblyInstPrinter.cpp [WebAssembly] Implement ref.null 2020-11-03 10:46:23 -08:00
WebAssemblyInstPrinter.h [AsmWriter] Factor out mnemonic generation to accessible getMnemonic. 2020-11-17 09:47:38 +00:00
WebAssemblyMCAsmInfo.cpp [WebAssembly] Added R_WASM_FUNCTION_OFFSET_I64 for use with DWARF DW_AT_low_pc 2020-11-13 09:32:31 -08:00
WebAssemblyMCAsmInfo.h
WebAssemblyMCCodeEmitter.cpp [WebAssembly] Implement ref.null 2020-11-03 10:46:23 -08:00
WebAssemblyMCTargetDesc.cpp [WebAssembly] Support select and block for reference types 2020-12-01 19:16:57 -08:00
WebAssemblyMCTargetDesc.h [WebAssembly][NFC] Refactor SIMD load/store tablegen defs 2020-12-22 20:06:12 -08:00
WebAssemblyTargetStreamer.cpp [WebAssembly] Added .tabletype to asm and multiple table support in obj files 2020-10-13 07:52:23 -07:00
WebAssemblyTargetStreamer.h [WebAssembly] Added .tabletype to asm and multiple table support in obj files 2020-10-13 07:52:23 -07:00
WebAssemblyWasmObjectWriter.cpp [WebAssembly] Added R_WASM_FUNCTION_OFFSET_I64 for use with DWARF DW_AT_low_pc 2020-11-13 09:32:31 -08:00