forked from OSchip/llvm-project
53 lines
1.7 KiB
LLVM
53 lines
1.7 KiB
LLVM
; RUN: llc -march=hexagon -enable-pipeliner -hexagon-initial-cfg-cleanup=0 -stats -o /dev/null < %s 2>&1 -pipeliner-experimental-cg=true | FileCheck %s --check-prefix=STATS
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; REQUIRES: asserts
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; Check that we handle the case when a value is first defined in the loop.
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; STATS: 1 pipeliner - Number of loops software pipelined
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; Function Attrs: nounwind
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define fastcc void @f0() #0 {
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b0:
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br i1 undef, label %b7, label %b1
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b1: ; preds = %b0
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br i1 undef, label %b2, label %b4
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b2: ; preds = %b1
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%v0 = load i16, i16* undef, align 2
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%v1 = load i16, i16* undef, align 2
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br i1 undef, label %b5, label %b3
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b3: ; preds = %b5, %b2
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%v2 = phi i16 [ 0, %b2 ], [ %v14, %b5 ]
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br label %b4
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b4: ; preds = %b3, %b1
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br i1 undef, label %b7, label %b6
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b5: ; preds = %b5, %b2
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%v3 = phi i16 [ %v5, %b5 ], [ undef, %b2 ]
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%v4 = phi i16 [ 0, %b5 ], [ %v1, %b2 ]
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%v5 = phi i16 [ 0, %b5 ], [ %v0, %b2 ]
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%v6 = phi i16 [ %v4, %b5 ], [ undef, %b2 ]
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%v7 = phi i16 [ %v14, %b5 ], [ 0, %b2 ]
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%v8 = phi i32 [ %v15, %b5 ], [ undef, %b2 ]
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%v9 = or i16 0, %v7
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%v10 = lshr i16 %v3, 8
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%v11 = lshr i16 %v6, 8
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%v12 = or i16 %v11, %v9
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%v13 = or i16 0, %v12
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%v14 = or i16 %v10, %v13
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%v15 = add nsw i32 %v8, -32
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%v16 = icmp sgt i32 %v15, 31
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br i1 %v16, label %b5, label %b3
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b6: ; preds = %b4
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br label %b7
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b7: ; preds = %b6, %b4, %b0
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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