llvm-project/llvm/test/Transforms/InstCombine/pr27343.ll

34 lines
1.0 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -instcombine | FileCheck %s
define i32 @__isnan(float %x) alwaysinline nounwind optsize {
; CHECK-LABEL: @__isnan(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTCAST:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DOTCAST]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SHL]], -16777216
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: ret i32 [[CONV]]
;
entry:
%x.addr = alloca float, align 4
store float %x, float* %x.addr, align 4
%0 = load float, float* %x.addr, align 4
%1 = bitcast float %0 to i32
%shl = shl i32 %1, 1
%cmp = icmp ugt i32 %shl, -16777216
%conv = zext i1 %cmp to i32
ret i32 %conv
}
define i1 @icmp_shl7(i32 %x) {
; CHECK-LABEL: @icmp_shl7(
; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], 7
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[SHL]], 4608
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 %x, 7
%cmp = icmp slt i32 %shl, 4608
ret i1 %cmp
}