forked from OSchip/llvm-project
105 lines
4.1 KiB
LLVM
105 lines
4.1 KiB
LLVM
; RUN: opt -disable-output -licm -print-memoryssa -enable-mssa-loop-dependency=true < %s 2>&1 | FileCheck %s
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target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
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target triple = "s390x-ibm-linux"
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@g_248 = external dso_local local_unnamed_addr global i32, align 4
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@g_976 = external dso_local global i64, align 8
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@g_1087 = external dso_local global i32**, align 8
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; CHECK-LABEL: @f1()
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; CHECK: 5 = MemoryPhi(
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; CHECK-NOT: 7 = MemoryPhi(
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define dso_local fastcc void @f1() unnamed_addr #0 {
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label0:
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br i1 undef, label %thread-pre-split.i.preheader, label %label5
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thread-pre-split.i.preheader: ; preds = %label0
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br label %thread-pre-split.i
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thread-pre-split.i.us: ; preds = %.critedge1.i.us
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br i1 undef, label %.preheader.i.us.preheader, label %label2
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.preheader.i.us.preheader: ; preds = %thread-pre-split.i.us
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br label %.preheader.i.us
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.preheader.i.us: ; preds = %._crit_edge.i.us, %.preheader.i.us.preheader
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br i1 undef, label %.lr.ph.i.us, label %._crit_edge.i.us
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.lr.ph.i.us: ; preds = %.preheader.i.us
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br label %label1
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label1: ; preds = %label1, %.lr.ph.i.us
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br i1 undef, label %label1, label %._crit_edge.i.us
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._crit_edge.i.us: ; preds = %label1, %.preheader.i.us
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br i1 undef, label %.preheader.i.us, label %._crit_edge5.i.us
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._crit_edge5.i.us: ; preds = %._crit_edge.i.us
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br label %label2
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label2: ; preds = %._crit_edge5.i.us, %thread-pre-split.i.us
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tail call void @foo16()
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br i1 undef, label %.lr.ph8.i.us.preheader, label %label4
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.lr.ph8.i.us.preheader: ; preds = %label2
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br label %.lr.ph8.i.us
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.lr.ph8.i.us: ; preds = %.lr.ph8.i.us, %.lr.ph8.i.us.preheader
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%tmp3 = load volatile i64, i64* @g_976, align 8
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br i1 undef, label %.lr.ph8.i.us, label %._crit_edge9.i.us
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._crit_edge9.i.us: ; preds = %.lr.ph8.i.us
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br label %label4
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label4: ; preds = %._crit_edge9.i.us, %label2
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br i1 true, label %f9.exit, label %.critedge1.i.us
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.critedge1.i.us: ; preds = %label4
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br i1 undef, label %thread-pre-split.i.us, label %f9.exit
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label5: ; preds = %label0
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unreachable
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thread-pre-split.i: ; preds = %.critedge1.i, %thread-pre-split.i.preheader
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br i1 undef, label %.preheader.i.preheader, label %.critedge1.i
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.preheader.i.preheader: ; preds = %thread-pre-split.i
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br label %.preheader.i
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.preheader.i: ; preds = %._crit_edge.i, %.preheader.i.preheader
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br i1 undef, label %.lr.ph.i, label %._crit_edge.i
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.lr.ph.i: ; preds = %.preheader.i
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br label %label6
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label6: ; preds = %label6, %.lr.ph.i
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br i1 undef, label %label6, label %._crit_edge.i.loopexit
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._crit_edge.i.loopexit: ; preds = %label6
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br label %._crit_edge.i
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._crit_edge.i: ; preds = %._crit_edge.i.loopexit, %.preheader.i
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br i1 undef, label %.preheader.i, label %._crit_edge5.i
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._crit_edge5.i: ; preds = %._crit_edge.i
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br label %.critedge1.i
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.critedge1.i: ; preds = %._crit_edge5.i, %thread-pre-split.i
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%tmp7 = load i32, i32* @g_248, align 4
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%tmp8 = xor i32 %tmp7, 55987
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store i32 %tmp8, i32* @g_248, align 4
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br i1 undef, label %thread-pre-split.i, label %f9.exit.loopexit
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f9.exit.loopexit: ; preds = %.critedge1.i
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br label %f9.exit
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f9.exit: ; preds = %f9.exit.loopexit, %.critedge1.i.us, %label4
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%tmp9 = load volatile i32**, i32*** @g_1087, align 8
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ret void
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}
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declare dso_local void @foo16() local_unnamed_addr #1
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attributes #0 = { "target-features"="+transactional-execution,+vector" }
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attributes #1 = { "use-soft-float"="false" }
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