forked from OSchip/llvm-project
138 lines
3.2 KiB
LLVM
138 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -O1 -S < %s -enable-new-pm=0 | FileCheck %s
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; RUN: opt -O2 -S < %s -enable-new-pm=0 | FileCheck %s
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; RUN: opt -O3 -S < %s -enable-new-pm=0 | FileCheck %s
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; RUN: opt -passes='default<O1>' -S < %s | FileCheck %s
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; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s
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; RUN: opt -passes='default<O3>' -S < %s | FileCheck %s
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; We are worse at propagating correlation facts when in select form
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; as compared to the PHI form, so if we lower switches to early,
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; we may make further optimizations problematic.
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; propagate value to bb2.
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define i64 @test1(i64 %x) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SWITCH_SELECTCMP:%.*]] = icmp eq i64 [[X:%.*]], 0
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; CHECK-NEXT: [[SWITCH_SELECT:%.*]] = select i1 [[SWITCH_SELECTCMP]], i64 0, i64 10
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; CHECK-NEXT: ret i64 [[SWITCH_SELECT]]
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;
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entry:
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switch i64 %x, label %bb3 [
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i64 0, label %bb1
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i64 1, label %bb2
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]
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bb1:
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ret i64 0
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bb2:
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%0 = icmp eq i64 %x, 100
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br i1 %0, label %bb4, label %bb5
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bb3:
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unreachable
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bb4:
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ret i64 200
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bb5:
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ret i64 10
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}
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; propagate value both to bb1 and bb2.
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define i64 @test2(i64 %x) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SWITCH_SELECTCMP:%.*]] = icmp eq i64 [[X:%.*]], 1
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; CHECK-NEXT: [[SWITCH_SELECT:%.*]] = select i1 [[SWITCH_SELECTCMP]], i64 0, i64 10
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; CHECK-NEXT: ret i64 [[SWITCH_SELECT]]
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;
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entry:
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switch i64 %x, label %bb3 [
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i64 1, label %bb1
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i64 2, label %bb2
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]
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bb1:
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%0 = icmp eq i64 %x, 100
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br i1 %0, label %bb4, label %return
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return:
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ret i64 0
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bb2:
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%1 = icmp eq i64 %x, 101
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br i1 %1, label %bb4, label %bb5
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bb3:
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unreachable
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bb4:
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ret i64 200
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bb5:
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ret i64 10
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}
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define i64 @test3(i64 %x) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[X:%.*]], 1
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[COND]], i64 10, i64 0
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; CHECK-NEXT: ret i64 [[SPEC_SELECT]]
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;
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entry:
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switch i64 %x, label %bb1 [
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i64 1, label %bb2
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]
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bb1:
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ret i64 0
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bb2:
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%0 = icmp eq i64 %x, 100
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br i1 %0, label %bb4, label %bb5
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bb4:
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ret i64 200
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bb5:
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ret i64 10
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}
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; bb2 has two predecessors with case value 1 and 2.
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define i64 @test_fail1(i64 %x) {
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; CHECK-LABEL: @test_fail1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SWITCH:%.*]] = icmp eq i64 [[X:%.*]], 0
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i64 0, i64 10
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; CHECK-NEXT: ret i64 [[SPEC_SELECT]]
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;
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entry:
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switch i64 %x, label %bb3 [
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i64 0, label %bb1
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i64 1, label %bb2
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i64 2, label %bb2
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]
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bb1:
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ret i64 0
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bb2:
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%0 = icmp eq i64 %x, 100
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br i1 %0, label %bb4, label %bb5
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bb3:
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unreachable
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bb4:
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ret i64 200
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bb5:
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ret i64 10
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}
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; return block has two predecessors.
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define i64 @test_fail2(i64 %x) {
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; CHECK-LABEL: @test_fail2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SWITCH_SELECTCMP:%.*]] = icmp eq i64 [[X:%.*]], 0
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; CHECK-NEXT: [[SWITCH_SELECT:%.*]] = select i1 [[SWITCH_SELECTCMP]], i64 2, i64 1
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; CHECK-NEXT: ret i64 [[SWITCH_SELECT]]
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;
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entry:
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switch i64 %x, label %bb2 [
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i64 0, label %bb1
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i64 1, label %return
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]
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bb1:
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br label %return
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return:
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%retval.0 = phi i64 [ %x, %entry ], [ 2, %bb1 ]
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ret i64 %retval.0
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bb2:
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unreachable
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}
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