llvm-project/llvm/test/CodeGen
Matthias Braun 08abcac9dc PeepholeOptimizer: Do not form PHI with subreg arguments
When replacing a PHI the PeepholeOptimizer currently takes the register
class of the register at the first operand. This however is not correct
if this argument has a subregister index.

As there is currently no API to query the register class resulting from
applying a subregister index to all registers in a class, we can only
abort in these cases and not perform the transformation.

This changes findNextSource() to require the end of all copy chains to
not use a subregister if there is any PHI in the chain. I had to rewrite
the overly complicated inner loop there to have a good place to insert
the new check.

This fixes https://llvm.org/PR33071 (aka rdar://32262041)

Differential Revision: https://reviews.llvm.org/D40758

llvm-svn: 322313
2018-01-11 21:57:03 +00:00
..
AArch64 [ValueTracking] recognize min/max-of-min/max with notted ops (PR35875) 2018-01-11 15:13:47 +00:00
AMDGPU [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. 2018-01-10 00:56:48 +00:00
ARC
ARM PeepholeOptimizer: Do not form PHI with subreg arguments 2018-01-11 21:57:03 +00:00
AVR [AVR] Fix two CodeGen tests 2017-12-09 07:51:43 +00:00
BPF bpf: add support for objdump -print-imm-hex 2017-12-20 19:39:58 +00:00
Generic [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
Hexagon [Hexagon] Fix building 64-bit vector from constant values 2018-01-11 18:30:41 +00:00
Inputs
Lanai [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. 2017-12-07 10:40:31 +00:00
MIR [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. 2018-01-10 00:56:48 +00:00
MSP430 [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
Mips [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. 2018-01-10 00:56:48 +00:00
NVPTX [DEBUG] Add initial tests for debug info for NVPTX target, NFC. 2018-01-04 21:07:07 +00:00
Nios2 [Nios2] Arithmetic instructions for R1 and R2 ISA. 2018-01-09 11:15:08 +00:00
PowerPC [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. 2018-01-10 00:56:48 +00:00
RISCV [RISCV] Reserve an emergency spill slot for the register scavenger when necessary 2018-01-11 11:17:19 +00:00
SPARC Revert r318704 - [Sparc] efficient pattern for UINT_TO_FP conversion 2017-12-11 22:25:04 +00:00
SystemZ Temporarily revert 2018-01-10 10:05:55 +00:00
Thumb [ARM] Fix PR35481 2018-01-08 11:32:37 +00:00
Thumb2 [CodeGen] Don't print "pred:" and "opt:" in -debug output 2018-01-09 17:31:07 +00:00
WebAssembly [WebAssembly] Add COMDAT support 2018-01-09 23:43:14 +00:00
WinCFGuard Reland "Emit Function IDs table for Control Flow Guard" 2018-01-09 23:49:30 +00:00
WinEH
X86 [X86] Legalize 128/256 gathers/scatters on KNL by using widening rather than sign extending the index. 2018-01-11 19:38:30 +00:00
XCore