forked from OSchip/llvm-project
56 lines
2.3 KiB
LLVM
56 lines
2.3 KiB
LLVM
; RUN: opt < %s -loop-accesses -analyze | FileCheck %s
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; RUN: opt -passes='require<scalar-evolution>,require<aa>,loop(print-access-info)' -disable-output < %s 2>&1 | FileCheck %s
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; Test to confirm LAA will not find store to invariant address.
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; Inner loop has no store to invariant address.
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;
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; for(; i < itr; i++) {
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; for(; j < itr; j++) {
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; var2[j] = var2[j] + var1[i];
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; }
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; }
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; CHECK: Non vectorizable stores to invariant address were not found in loop.
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; CHECK-NOT: Non vectorizable stores to invariant address were found in loop.
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define i32 @foo(i32* nocapture readonly %var1, i32* nocapture %var2, i32 %itr) #0 {
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entry:
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%cmp20 = icmp eq i32 %itr, 0
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br i1 %cmp20, label %for.end10, label %for.cond1.preheader
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for.cond1.preheader: ; preds = %entry, %for.inc8
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%indvars.iv23 = phi i64 [ %indvars.iv.next24, %for.inc8 ], [ 0, %entry ]
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%j.022 = phi i32 [ %j.1.lcssa, %for.inc8 ], [ 0, %entry ]
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%cmp218 = icmp ult i32 %j.022, %itr
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br i1 %cmp218, label %for.body3.lr.ph, label %for.inc8
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for.body3.lr.ph: ; preds = %for.cond1.preheader
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%arrayidx5 = getelementptr inbounds i32, i32* %var1, i64 %indvars.iv23
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%0 = zext i32 %j.022 to i64
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br label %for.body3
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for.body3: ; preds = %for.body3, %for.body3.lr.ph
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%indvars.iv = phi i64 [ %0, %for.body3.lr.ph ], [ %indvars.iv.next, %for.body3 ]
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%arrayidx = getelementptr inbounds i32, i32* %var2, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx, align 4
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%2 = load i32, i32* %arrayidx5, align 4
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%add = add nsw i32 %2, %1
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store i32 %add, i32* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %itr
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br i1 %exitcond, label %for.inc8, label %for.body3
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for.inc8: ; preds = %for.body3, %for.cond1.preheader
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%j.1.lcssa = phi i32 [ %j.022, %for.cond1.preheader ], [ %itr, %for.body3 ]
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%indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
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%lftr.wideiv25 = trunc i64 %indvars.iv.next24 to i32
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%exitcond26 = icmp eq i32 %lftr.wideiv25, %itr
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br i1 %exitcond26, label %for.end10, label %for.cond1.preheader
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for.end10: ; preds = %for.inc8, %entry
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ret i32 undef
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}
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