Sander de Smalen c1e44bdfc7 [AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector instructions. ... Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, javed.absar Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D46250 llvm-svn: 331339		2018-05-02 08:49:08 +00:00
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AArch64	[AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector instructions.	2018-05-02 08:49:08 +00:00
AMDGPU	AMDGPU: Remove remnants of gfx901 (it was deprecated some time ago)	2018-05-01 18:47:48 +00:00
ARM	[ARM] Do not convert some vmov instructions	2018-04-04 08:54:19 +00:00
AVR	[AVR] Implement some missing code paths	2017-12-11 11:01:27 +00:00
AsmParser	[MC] Change AsmParser to leverage Assembler during evaluation	2018-04-30 19:22:40 +00:00
BPF	bpf: New disassembler testcases for 32-bit subregister support	2018-02-23 23:49:35 +00:00
COFF	[codeview] Ignore .cv_loc directives at the end of a function	2018-04-25 23:34:15 +00:00
Disassembler	[X86] movdiri and movdir64b instructions	2018-05-01 10:01:16 +00:00
ELF	ELFObjectWriter: Allow one unique symver per symbol	2018-04-27 20:32:34 +00:00
Hexagon	[Hexagon] Recognize and handle :endloop01	2018-03-30 15:29:47 +00:00
Lanai	…
MachO	MachO: trap unreachable instructions	2018-04-13 22:25:20 +00:00
Mips	[mips] Fix microMIPS loads and stores.	2018-04-30 09:44:44 +00:00
PowerPC	[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.	2018-02-23 15:55:16 +00:00
RISCV	[RISCV] Allow call pseudoinstruction to be used to call a function name that coincides with a register name	2018-04-25 17:25:29 +00:00
Sparc	[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed	2017-07-25 15:28:28 +00:00
SystemZ	[SystemZ, AsmParser] Enable the mnemonic spell corrector.	2017-07-18 09:17:00 +00:00
WebAssembly	[WebAssembly] llvm-readobj: display symbols names in relocations	2018-05-01 16:35:16 +00:00
X86	[X86] movdiri and movdir64b instructions	2018-05-01 10:01:16 +00:00