forked from OSchip/llvm-project
99 lines
5.0 KiB
LLVM
99 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=+avx512vbmi | FileCheck %s
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declare <64 x i8> @llvm.x86.avx512.mask.permvar.qi.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)
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define <64 x i8>@test_int_x86_avx512_mask_permvar_qi_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) {
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; CHECK-LABEL: test_int_x86_avx512_mask_permvar_qi_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovq %rdi, %k1
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; CHECK-NEXT: vpermb %zmm0, %zmm1, %zmm2 {%k1}
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; CHECK-NEXT: vpermb %zmm0, %zmm1, %zmm3 {%k1} {z}
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; CHECK-NEXT: vpermb %zmm0, %zmm1, %zmm0
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; CHECK-NEXT: vpaddb %zmm3, %zmm2, %zmm1
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; CHECK-NEXT: vpaddb %zmm0, %zmm1, %zmm0
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; CHECK-NEXT: retq
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%res = call <64 x i8> @llvm.x86.avx512.mask.permvar.qi.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)
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%res1 = call <64 x i8> @llvm.x86.avx512.mask.permvar.qi.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> zeroinitializer, i64 %x3)
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%res2 = call <64 x i8> @llvm.x86.avx512.mask.permvar.qi.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)
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%res3 = add <64 x i8> %res, %res1
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%res4 = add <64 x i8> %res3, %res2
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ret <64 x i8> %res4
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}
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declare <64 x i8> @llvm.x86.avx512.mask.pmultishift.qb.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)
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define <64 x i8>@test_int_x86_avx512_mask_pmultishift_qb_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) {
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; CHECK-LABEL: test_int_x86_avx512_mask_pmultishift_qb_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovq %rdi, %k1
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; CHECK-NEXT: vpmultishiftqb %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpmultishiftqb %zmm1, %zmm0, %zmm3 {%k1} {z}
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; CHECK-NEXT: vpmultishiftqb %zmm1, %zmm0, %zmm0
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; CHECK-NEXT: vpaddb %zmm3, %zmm2, %zmm1
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; CHECK-NEXT: vpaddb %zmm0, %zmm1, %zmm0
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; CHECK-NEXT: retq
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%res = call <64 x i8> @llvm.x86.avx512.mask.pmultishift.qb.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)
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%res1 = call <64 x i8> @llvm.x86.avx512.mask.pmultishift.qb.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> zeroinitializer, i64 %x3)
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%res2 = call <64 x i8> @llvm.x86.avx512.mask.pmultishift.qb.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)
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%res3 = add <64 x i8> %res, %res1
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%res4 = add <64 x i8> %res3, %res2
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ret <64 x i8> %res4
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}
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declare <64 x i8> @llvm.x86.avx512.mask.vpermi2var.qi.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)
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define <64 x i8>@test_int_x86_avx512_mask_vpermi2var_qi_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) {
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; CHECK-LABEL: test_int_x86_avx512_mask_vpermi2var_qi_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovq %rdi, %k1
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm3
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; CHECK-NEXT: vpermt2b %zmm2, %zmm0, %zmm3 {%k1}
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; CHECK-NEXT: vpermt2b %zmm2, %zmm0, %zmm1
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; CHECK-NEXT: vpxord %zmm4, %zmm4, %zmm4
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; CHECK-NEXT: vpermt2b %zmm2, %zmm0, %zmm4 {%k1} {z}
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; CHECK-NEXT: vpaddb %zmm1, %zmm3, %zmm0
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; CHECK-NEXT: vpaddb %zmm0, %zmm4, %zmm0
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; CHECK-NEXT: retq
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%res = call <64 x i8> @llvm.x86.avx512.mask.vpermi2var.qi.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)
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%res1 = call <64 x i8> @llvm.x86.avx512.mask.vpermi2var.qi.512(<64 x i8> %x0, <64 x i8> zeroinitializer, <64 x i8> %x2, i64 %x3)
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%res2 = call <64 x i8> @llvm.x86.avx512.mask.vpermi2var.qi.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)
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%res3 = add <64 x i8> %res, %res1
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%res4 = add <64 x i8> %res3, %res2
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ret <64 x i8> %res4
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}
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declare <64 x i8> @llvm.x86.avx512.mask.vpermt2var.qi.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)
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define <64 x i8>@test_int_x86_avx512_mask_vpermt2var_qi_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) {
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; CHECK-LABEL: test_int_x86_avx512_mask_vpermt2var_qi_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovq %rdi, %k1
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm3
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; CHECK-NEXT: vpermt2b %zmm2, %zmm0, %zmm3 {%k1}
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; CHECK-NEXT: vpermt2b %zmm2, %zmm0, %zmm1
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; CHECK-NEXT: vpxord %zmm4, %zmm4, %zmm4
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; CHECK-NEXT: vpermt2b %zmm2, %zmm0, %zmm4 {%k1} {z}
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; CHECK-NEXT: vpaddb %zmm1, %zmm3, %zmm0
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; CHECK-NEXT: vpaddb %zmm0, %zmm4, %zmm0
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; CHECK-NEXT: retq
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%res = call <64 x i8> @llvm.x86.avx512.mask.vpermt2var.qi.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)
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%res1 = call <64 x i8> @llvm.x86.avx512.mask.vpermt2var.qi.512(<64 x i8> %x0, <64 x i8> zeroinitializer, <64 x i8> %x2, i64 %x3)
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%res2 = call <64 x i8> @llvm.x86.avx512.mask.vpermt2var.qi.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)
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%res3 = add <64 x i8> %res, %res1
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%res4 = add <64 x i8> %res3, %res2
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ret <64 x i8> %res4
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}
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declare <64 x i8> @llvm.x86.avx512.maskz.vpermt2var.qi.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)
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define <64 x i8>@test_int_x86_avx512_maskz_vpermt2var_qi_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) {
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; CHECK-LABEL: test_int_x86_avx512_maskz_vpermt2var_qi_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovq %rdi, %k1
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; CHECK-NEXT: vpermt2b %zmm2, %zmm0, %zmm1 {%k1} {z}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%res = call <64 x i8> @llvm.x86.avx512.maskz.vpermt2var.qi.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)
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ret <64 x i8> %res
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}
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