forked from OSchip/llvm-project
223 lines
4.5 KiB
YAML
223 lines
4.5 KiB
YAML
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @anyext_s64_s32() { ret void }
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define void @anyext_s32_s8() { ret void }
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define void @zext_s64_s32() { ret void }
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define void @zext_s32_s8() { ret void }
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define void @zext_s16_s8() { ret void }
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define void @sext_s64_s32() { ret void }
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define void @sext_s32_s8() { ret void }
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define void @sext_s16_s8() { ret void }
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...
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---
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# CHECK-LABEL: name: anyext_s64_s32
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name: anyext_s64_s32
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32all }
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# CHECK-NEXT: - { id: 1, class: gpr64all }
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# CHECK-NEXT: - { id: 2, class: gpr64all }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: %0 = COPY %w0
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# CHECK: %2 = SUBREG_TO_REG 0, %0, 15
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# CHECK: %1 = COPY %2
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body: |
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bb.0:
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liveins: %w0
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%0(s32) = COPY %w0
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%1(s64) = G_ANYEXT %0
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%x0 = COPY %1(s64)
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...
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---
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# CHECK-LABEL: name: anyext_s32_s8
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name: anyext_s32_s8
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32all }
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# CHECK-NEXT: - { id: 1, class: gpr32all }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: %0 = COPY %w0
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# CHECK: %1 = COPY %0
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body: |
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bb.0:
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liveins: %w0
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%0(s8) = COPY %w0
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%1(s32) = G_ANYEXT %0
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%w0 = COPY %1(s32)
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...
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---
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# CHECK-LABEL: name: zext_s64_s32
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name: zext_s64_s32
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32 }
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# CHECK-NEXT: - { id: 1, class: gpr64 }
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# CHECK-NEXT: - { id: 2, class: gpr64 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: %0 = COPY %w0
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# CHECK: %2 = SUBREG_TO_REG 0, %0, 15
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# CHECK: %1 = UBFMXri %2, 0, 31
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body: |
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bb.0:
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liveins: %w0
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%0(s32) = COPY %w0
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%1(s64) = G_ZEXT %0
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%x0 = COPY %1(s64)
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...
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---
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# CHECK-LABEL: name: zext_s32_s8
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name: zext_s32_s8
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32 }
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# CHECK-NEXT: - { id: 1, class: gpr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: %0 = COPY %w0
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# CHECK: %1 = UBFMWri %0, 0, 7
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body: |
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bb.0:
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liveins: %w0
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%0(s8) = COPY %w0
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%1(s32) = G_ZEXT %0
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%w0 = COPY %1(s32)
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...
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---
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# CHECK-LABEL: name: zext_s16_s8
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name: zext_s16_s8
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32 }
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# CHECK-NEXT: - { id: 1, class: gpr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: %0 = COPY %w0
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# CHECK: %1 = UBFMWri %0, 0, 7
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body: |
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bb.0:
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liveins: %w0
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%0(s8) = COPY %w0
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%1(s16) = G_ZEXT %0
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%w0 = COPY %1(s16)
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...
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---
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# CHECK-LABEL: name: sext_s64_s32
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name: sext_s64_s32
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32 }
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# CHECK-NEXT: - { id: 1, class: gpr64 }
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# CHECK-NEXT: - { id: 2, class: gpr64 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: %0 = COPY %w0
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# CHECK: %2 = SUBREG_TO_REG 0, %0, 15
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# CHECK: %1 = SBFMXri %2, 0, 31
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body: |
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bb.0:
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liveins: %w0
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%0(s32) = COPY %w0
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%1(s64) = G_SEXT %0
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%x0 = COPY %1(s64)
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...
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---
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# CHECK-LABEL: name: sext_s32_s8
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name: sext_s32_s8
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32 }
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# CHECK-NEXT: - { id: 1, class: gpr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: %0 = COPY %w0
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# CHECK: %1 = SBFMWri %0, 0, 7
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body: |
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bb.0:
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liveins: %w0
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%0(s8) = COPY %w0
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%1(s32) = G_SEXT %0
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%w0 = COPY %1(s32)
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...
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---
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# CHECK-LABEL: name: sext_s16_s8
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name: sext_s16_s8
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32 }
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# CHECK-NEXT: - { id: 1, class: gpr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: %0 = COPY %w0
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# CHECK: %1 = SBFMWri %0, 0, 7
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body: |
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bb.0:
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liveins: %w0
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%0(s8) = COPY %w0
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%1(s16) = G_SEXT %0
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%w0 = COPY %1(s16)
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...
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