forked from OSchip/llvm-project
90ad6835dd
This re-applies r336929 with a fix to accomodate for the Mips target scheduling multiple SelectionDAG instances into the pass pipeline. PrologEpilogInserter and StackColoring depend on the StackProtector analysis being alive from the point it is run until PEI, which requires that they are all scheduled in the same FunctionPassManager. Inserting a (machine) ModulePass between StackProtector and PEI results in these passes being in separate FunctionPassManagers and the StackProtector is not available for PEI. PEI and StackColoring don't use much information from the StackProtector pass, so transfering the required information to MachineFrameInfo is cleaner than keeping the StackProtector pass around. This commit moves the SSP layout information to MFI instead of keeping it in the pass. This patch set (D37580, D37581, D37582, D37583, D37584, D37585, D37586, D37587) is a first draft of the pagerando implementation described in http://lists.llvm.org/pipermail/llvm-dev/2017-June/113794.html. Patch by Stephen Crane <sjc@immunant.com> Differential Revision: https://reviews.llvm.org/D49256 llvm-svn: 336964 |
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.. | ||
CMakeLists.txt | ||
CallLowering.cpp | ||
Combiner.cpp | ||
CombinerHelper.cpp | ||
GlobalISel.cpp | ||
IRTranslator.cpp | ||
InstructionSelect.cpp | ||
InstructionSelector.cpp | ||
LLVMBuild.txt | ||
LegalityPredicates.cpp | ||
LegalizeMutations.cpp | ||
Legalizer.cpp | ||
LegalizerHelper.cpp | ||
LegalizerInfo.cpp | ||
Localizer.cpp | ||
MachineIRBuilder.cpp | ||
RegBankSelect.cpp | ||
RegisterBank.cpp | ||
RegisterBankInfo.cpp | ||
Utils.cpp |