forked from OSchip/llvm-project
46 lines
1.2 KiB
LLVM
46 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32IM %s
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define i32 @urem(i32 %a, i32 %b) nounwind {
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; RV32I-LABEL: urem:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: lui a2, %hi(__umodsi3)
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; RV32I-NEXT: addi a2, a2, %lo(__umodsi3)
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; RV32I-NEXT: jalr a2
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32IM-LABEL: urem:
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; RV32IM: # %bb.0:
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; RV32IM-NEXT: remu a0, a0, a1
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; RV32IM-NEXT: ret
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%1 = urem i32 %a, %b
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ret i32 %1
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}
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define i32 @srem(i32 %a, i32 %b) nounwind {
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; RV32I-LABEL: srem:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: lui a2, %hi(__modsi3)
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; RV32I-NEXT: addi a2, a2, %lo(__modsi3)
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; RV32I-NEXT: jalr a2
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32IM-LABEL: srem:
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; RV32IM: # %bb.0:
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; RV32IM-NEXT: rem a0, a0, a1
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; RV32IM-NEXT: ret
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%1 = srem i32 %a, %b
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ret i32 %1
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}
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