llvm-project/llvm/test/CodeGen/Lanai
Puyan Lotfi 43e94b15ea Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00
..
codemodel.ll [lanai] Simplify small section check in LowerGlobalAddress and treat ldata sections specially. 2016-12-15 16:56:16 +00:00
comparisons_i32.ll
comparisons_i64.ll
constant_multiply.ll
delay_filler.ll
i32.ll
lanai-misched-trivial-disjoint.ll [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. 2017-12-07 10:40:31 +00:00
lit.local.cfg
lshift64.ll
masking_setccs.ll [lanai] Add computeKnownBitsForTargetNode for Lanai. 2017-05-09 18:35:26 +00:00
mem_alu_combiner.ll
multiply.ll
peephole-compare.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
rshift64.ll
select.ll
set_and_hi.ll
shift.ll
stack-frame.ll
sub-cmp-peephole.ll
subword.ll