forked from OSchip/llvm-project
49 lines
1.5 KiB
LLVM
49 lines
1.5 KiB
LLVM
; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mattr=+arith-bcc-fusion | FileCheck %s --check-prefix=FUSEBCC
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; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mattr=+arith-cbz-fusion | FileCheck %s --check-prefix=FUSECBZ
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; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cyclone | FileCheck %s --check-prefix=FUSEBCC --check-prefix=FUSECBZ
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target triple = "aarch64-unknown"
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declare void @foobar(i32 %v0, i32 %v1)
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; Make sure cmp is scheduled in front of bcc
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; FUSEBCC-LABEL: test_cmp_bcc:
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; FUSEBCC: cmp {{w[0-9]+}}, #13
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; FUSEBCC-NEXT: b.ne {{.?LBB[0-9_]+}}
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define void @test_cmp_bcc(i32 %a0, i32 %a1) {
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entry:
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%cond = icmp eq i32 %a0, 13
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%v1 = add i32 %a1, 7
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br i1 %cond, label %if, label %exit
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if:
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call void @foobar(i32 %v1, i32 %a0)
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br label %exit
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exit:
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call void @foobar(i32 %a0, i32 %v1)
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ret void
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}
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; Make sure sub is scheduled in front of cbnz
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; FUSECBZ-LABEL: test_sub_cbz:
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; FUSECBZ: sub [[R:w[0-9]+]], {{w[0-9]+}}, #13
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; FUSECBZ-NEXT: cbnz [[R]], {{.?LBB[0-9_]+}}
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define void @test_sub_cbz(i32 %a0, i32 %a1) {
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entry:
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; except for the fusion opportunity the sub/add should be equal so the
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; scheduler would leave them in source order if it weren't for the scheduling
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%v0 = sub i32 %a0, 13
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%cond = icmp eq i32 %v0, 0
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%v1 = add i32 %a1, 7
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br i1 %cond, label %if, label %exit
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if:
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call void @foobar(i32 %v1, i32 %v0)
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br label %exit
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exit:
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call void @foobar(i32 %v0, i32 %v1)
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ret void
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}
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