forked from OSchip/llvm-project
27 lines
1021 B
YAML
27 lines
1021 B
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -mattr=+fuse-aes -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
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---
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# Check that we select the aarch64_crypto_aesmc and aarch64_crypto_aese
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# intrinsics into an ARSMCrrTied and AESErr instruction sequence.
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name: aesmc_aese
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $q0, $q1
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; CHECK-LABEL: name: aesmc_aese
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; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
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; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
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; CHECK: [[T0:%[0-9]+]]:fpr128 = AESErr [[COPY]], [[COPY1]]
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; CHECK: [[T1:%[0-9]+]]:fpr128 = AESMCrrTied [[T0]]
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; CHECK: $q0 = COPY [[T1]]
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%0:fpr(<16 x s8>) = COPY $q0
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%1:fpr(<16 x s8>) = COPY $q1
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%2:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aese), %0, %1
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%3:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aesmc), %2
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$q0 = COPY %3(<16 x s8>)
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...
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