forked from OSchip/llvm-project
96 lines
3.3 KiB
YAML
96 lines
3.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -mattr=+lse -run-pass=legalizer -verify-machineinstrs -global-isel %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @cmpxchg_i8(i8* %addr) { ret void }
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define void @cmpxchg_i16(i16* %addr) { ret void }
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define void @cmpxchg_i32(i32* %addr) { ret void }
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define void @cmpxchg_i64(i64* %addr) { ret void }
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...
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---
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name: cmpxchg_i8
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: cmpxchg_i8
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[CMP:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[CMPT:%[0-9]+]]:_(s8) = G_TRUNC [[CMP]]
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; CHECK: [[CST:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[CSTT:%[0-9]+]]:_(s8) = G_TRUNC [[CST]]
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; CHECK: [[RES:%[0-9]+]]:_(s8) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[CMPT]], [[CSTT]] :: (load store monotonic 1 on %ir.addr)
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; CHECK: [[RES2:%[0-9]+]]:_(s32) = G_ANYEXT [[RES]](s8)
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; CHECK: $w0 = COPY [[RES2]]
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%0:_(p0) = COPY $x0
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%1:_(s8) = G_CONSTANT i8 0
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%2:_(s8) = G_CONSTANT i8 1
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%3:_(s8) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 1 on %ir.addr)
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%4:_(s32) = G_ANYEXT %3
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$w0 = COPY %4(s32)
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...
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---
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name: cmpxchg_i16
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: cmpxchg_i16
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[CMP:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[CMPT:%[0-9]+]]:_(s16) = G_TRUNC [[CMP]]
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; CHECK: [[CST:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[CSTT:%[0-9]+]]:_(s16) = G_TRUNC [[CST]]
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; CHECK: [[RES:%[0-9]+]]:_(s16) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[CMPT]], [[CSTT]] :: (load store monotonic 2 on %ir.addr)
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; CHECK: [[RES2:%[0-9]+]]:_(s32) = G_ANYEXT [[RES]](s16)
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; CHECK: $w0 = COPY [[RES2]]
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%0:_(p0) = COPY $x0
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%1:_(s16) = G_CONSTANT i16 0
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%2:_(s16) = G_CONSTANT i16 1
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%3:_(s16) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 2 on %ir.addr)
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%4:_(s32) = G_ANYEXT %3
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$w0 = COPY %4(s32)
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...
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---
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name: cmpxchg_i32
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: cmpxchg_i32
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[CMP:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[CST:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[RES:%[0-9]+]]:_(s32) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[CMP]], [[CST]] :: (load store monotonic 4 on %ir.addr)
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; CHECK: $w0 = COPY [[RES]]
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%0:_(p0) = COPY $x0
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%1:_(s32) = G_CONSTANT i32 0
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%2:_(s32) = G_CONSTANT i32 1
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%3:_(s32) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 4 on %ir.addr)
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$w0 = COPY %3(s32)
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...
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---
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name: cmpxchg_i64
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: cmpxchg_i64
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[CMP:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK: [[CST:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[RES:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[CMP]], [[CST]] :: (load store monotonic 8 on %ir.addr)
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; CHECK: $x0 = COPY [[RES]]
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%0:_(p0) = COPY $x0
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%1:_(s64) = G_CONSTANT i64 0
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%2:_(s64) = G_CONSTANT i64 1
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%3:_(s64) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 8 on %ir.addr)
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$x0 = COPY %3(s64)
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...
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