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llvm-project/llvm/test/CodeGen
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Francis Visoiu Mistrih e85b06d65f [CodeGen] Use MIR syntax for MachineMemOperand printing 
Get rid of the "; mem:" suffix and use the one we use in MIR: ":: (load 2)".

rdar://38163529

Differential Revision: https://reviews.llvm.org/D42377

llvm-svn: 327580
 		2018-03-14 21:52:13 +00:00
..
AArch64 [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
AMDGPU [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
ARC
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ARM [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
AVR [AVR] Remove the earlyclobber flag from LDDWRdYQ 2018-03-06 11:20:25 +00:00
BPF bpf: Extends zero extension elimination beyond comparison instructions 2018-03-13 06:47:03 +00:00
Generic Revert "Reapply "[DWARFv5] Emit file 0 to the line table."" 2018-03-07 16:27:44 +00:00
Hexagon [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
Inputs
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Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MIR [MIR] Allow frame-setup and frame-destroy on the same instruction 2018-03-13 19:53:16 +00:00
MSP430 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Mips [mips] Fix the definitions of the EVA instructions 2018-03-13 14:39:44 +00:00
NVPTX [DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors. 2018-03-01 22:32:25 +00:00
Nios2
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PowerPC [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
RISCV [RISCV] Update two tests after r326208 2018-02-28 08:20:47 +00:00
SPARC Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-27 16:59:10 +00:00
SystemZ [CodeGenPrepare] Respect endianness in splitMergedValStore. 2018-03-13 08:36:20 +00:00
Thumb [ARM] Fix access to stack arguments when re-aligning SP in Armv6m 2018-03-02 15:47:14 +00:00
Thumb2 ARM: Don't rewrite add reg, $sp, 0 -> mov reg, $sp if the add defines CPSR. 2018-02-27 19:00:59 +00:00
WebAssembly [WebAssembly] Add mechanisms for specifying an explicit import module name. 2018-02-09 23:13:22 +00:00
WinCFGuard
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WinEH
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X86 [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
XCore [XCore] Return true in enableMultipleCopyHints(). 2018-02-26 08:03:32 +00:00