forked from OSchip/llvm-project
345 lines
8.9 KiB
C++
345 lines
8.9 KiB
C++
//===- X86LegalizerInfo.cpp --------------------------------------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for X86.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "X86LegalizerInfo.h"
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#include "X86Subtarget.h"
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#include "X86TargetMachine.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Target/TargetOpcodes.h"
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using namespace llvm;
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using namespace TargetOpcode;
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X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
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const X86TargetMachine &TM)
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: Subtarget(STI), TM(TM) {
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setLegalizerInfo32bit();
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setLegalizerInfo64bit();
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setLegalizerInfoSSE1();
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setLegalizerInfoSSE2();
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setLegalizerInfoSSE41();
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setLegalizerInfoAVX();
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setLegalizerInfoAVX2();
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setLegalizerInfoAVX512();
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setLegalizerInfoAVX512DQ();
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setLegalizerInfoAVX512BW();
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computeTables();
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}
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void X86LegalizerInfo::setLegalizerInfo32bit() {
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const LLT p0 = LLT::pointer(0, TM.getPointerSize() * 8);
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const LLT s1 = LLT::scalar(1);
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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for (auto Ty : {p0, s1, s8, s16, s32})
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setAction({G_IMPLICIT_DEF, Ty}, Legal);
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for (auto Ty : {s8, s16, s32, p0})
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setAction({G_PHI, Ty}, Legal);
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setAction({G_PHI, s1}, WidenScalar);
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for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR}) {
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for (auto Ty : {s8, s16, s32})
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setAction({BinOp, Ty}, Legal);
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setAction({BinOp, s1}, WidenScalar);
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}
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for (unsigned Op : {G_UADDE}) {
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setAction({Op, s32}, Legal);
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setAction({Op, 1, s1}, Legal);
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}
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for (unsigned MemOp : {G_LOAD, G_STORE}) {
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for (auto Ty : {s8, s16, s32, p0})
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setAction({MemOp, Ty}, Legal);
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setAction({MemOp, s1}, WidenScalar);
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// And everything's fine in addrspace 0.
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setAction({MemOp, 1, p0}, Legal);
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}
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// Pointer-handling
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setAction({G_FRAME_INDEX, p0}, Legal);
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setAction({G_GLOBAL_VALUE, p0}, Legal);
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setAction({G_GEP, p0}, Legal);
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setAction({G_GEP, 1, s32}, Legal);
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for (auto Ty : {s1, s8, s16})
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setAction({G_GEP, 1, Ty}, WidenScalar);
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// Control-flow
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setAction({G_BRCOND, s1}, Legal);
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// Constants
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for (auto Ty : {s8, s16, s32, p0})
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setAction({TargetOpcode::G_CONSTANT, Ty}, Legal);
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setAction({TargetOpcode::G_CONSTANT, s1}, WidenScalar);
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setAction({TargetOpcode::G_CONSTANT, s64}, NarrowScalar);
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// Extensions
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for (auto Ty : {s8, s16, s32}) {
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setAction({G_ZEXT, Ty}, Legal);
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setAction({G_SEXT, Ty}, Legal);
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setAction({G_ANYEXT, Ty}, Legal);
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}
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for (auto Ty : {s1, s8, s16}) {
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setAction({G_ZEXT, 1, Ty}, Legal);
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setAction({G_SEXT, 1, Ty}, Legal);
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setAction({G_ANYEXT, 1, Ty}, Legal);
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}
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// Comparison
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setAction({G_ICMP, s1}, Legal);
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for (auto Ty : {s8, s16, s32, p0})
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setAction({G_ICMP, 1, Ty}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfo64bit() {
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if (!Subtarget.is64Bit())
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return;
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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setAction({G_IMPLICIT_DEF, s64}, Legal);
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setAction({G_PHI, s64}, Legal);
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for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
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setAction({BinOp, s64}, Legal);
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for (unsigned MemOp : {G_LOAD, G_STORE})
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setAction({MemOp, s64}, Legal);
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// Pointer-handling
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setAction({G_GEP, 1, s64}, Legal);
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// Constants
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setAction({TargetOpcode::G_CONSTANT, s64}, Legal);
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// Extensions
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for (unsigned extOp : {G_ZEXT, G_SEXT, G_ANYEXT}) {
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setAction({extOp, s64}, Legal);
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setAction({extOp, 1, s32}, Legal);
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}
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// Comparison
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setAction({G_ICMP, 1, s64}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoSSE1() {
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if (!Subtarget.hasSSE1())
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return;
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const LLT s32 = LLT::scalar(32);
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const LLT v4s32 = LLT::vector(4, 32);
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const LLT v2s64 = LLT::vector(2, 64);
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for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
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for (auto Ty : {s32, v4s32})
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setAction({BinOp, Ty}, Legal);
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for (unsigned MemOp : {G_LOAD, G_STORE})
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for (auto Ty : {v4s32, v2s64})
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setAction({MemOp, Ty}, Legal);
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// Constants
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setAction({TargetOpcode::G_FCONSTANT, s32}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoSSE2() {
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if (!Subtarget.hasSSE2())
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return;
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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const LLT v16s8 = LLT::vector(16, 8);
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const LLT v8s16 = LLT::vector(8, 16);
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const LLT v4s32 = LLT::vector(4, 32);
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const LLT v2s64 = LLT::vector(2, 64);
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for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
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for (auto Ty : {s64, v2s64})
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setAction({BinOp, Ty}, Legal);
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for (unsigned BinOp : {G_ADD, G_SUB})
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for (auto Ty : {v16s8, v8s16, v4s32, v2s64})
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setAction({BinOp, Ty}, Legal);
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setAction({G_MUL, v8s16}, Legal);
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setAction({G_FPEXT, s64}, Legal);
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setAction({G_FPEXT, 1, s32}, Legal);
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// Constants
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setAction({TargetOpcode::G_FCONSTANT, s64}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoSSE41() {
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if (!Subtarget.hasSSE41())
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return;
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const LLT v4s32 = LLT::vector(4, 32);
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setAction({G_MUL, v4s32}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoAVX() {
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if (!Subtarget.hasAVX())
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return;
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const LLT v16s8 = LLT::vector(16, 8);
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const LLT v8s16 = LLT::vector(8, 16);
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const LLT v4s32 = LLT::vector(4, 32);
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const LLT v2s64 = LLT::vector(2, 64);
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const LLT v32s8 = LLT::vector(32, 8);
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const LLT v16s16 = LLT::vector(16, 16);
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const LLT v8s32 = LLT::vector(8, 32);
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const LLT v4s64 = LLT::vector(4, 64);
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for (unsigned MemOp : {G_LOAD, G_STORE})
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for (auto Ty : {v8s32, v4s64})
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setAction({MemOp, Ty}, Legal);
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for (auto Ty : {v32s8, v16s16, v8s32, v4s64}) {
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setAction({G_INSERT, Ty}, Legal);
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setAction({G_EXTRACT, 1, Ty}, Legal);
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}
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for (auto Ty : {v16s8, v8s16, v4s32, v2s64}) {
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setAction({G_INSERT, 1, Ty}, Legal);
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setAction({G_EXTRACT, Ty}, Legal);
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}
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}
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void X86LegalizerInfo::setLegalizerInfoAVX2() {
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if (!Subtarget.hasAVX2())
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return;
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const LLT v32s8 = LLT::vector(32, 8);
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const LLT v16s16 = LLT::vector(16, 16);
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const LLT v8s32 = LLT::vector(8, 32);
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const LLT v4s64 = LLT::vector(4, 64);
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for (unsigned BinOp : {G_ADD, G_SUB})
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for (auto Ty : {v32s8, v16s16, v8s32, v4s64})
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setAction({BinOp, Ty}, Legal);
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for (auto Ty : {v16s16, v8s32})
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setAction({G_MUL, Ty}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoAVX512() {
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if (!Subtarget.hasAVX512())
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return;
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const LLT v16s8 = LLT::vector(16, 8);
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const LLT v8s16 = LLT::vector(8, 16);
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const LLT v4s32 = LLT::vector(4, 32);
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const LLT v2s64 = LLT::vector(2, 64);
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const LLT v32s8 = LLT::vector(32, 8);
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const LLT v16s16 = LLT::vector(16, 16);
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const LLT v8s32 = LLT::vector(8, 32);
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const LLT v4s64 = LLT::vector(4, 64);
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const LLT v64s8 = LLT::vector(64, 8);
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const LLT v32s16 = LLT::vector(32, 16);
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const LLT v16s32 = LLT::vector(16, 32);
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const LLT v8s64 = LLT::vector(8, 64);
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for (unsigned BinOp : {G_ADD, G_SUB})
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for (auto Ty : {v16s32, v8s64})
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setAction({BinOp, Ty}, Legal);
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setAction({G_MUL, v16s32}, Legal);
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for (unsigned MemOp : {G_LOAD, G_STORE})
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for (auto Ty : {v16s32, v8s64})
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setAction({MemOp, Ty}, Legal);
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for (auto Ty : {v64s8, v32s16, v16s32, v8s64}) {
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setAction({G_INSERT, Ty}, Legal);
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setAction({G_EXTRACT, 1, Ty}, Legal);
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}
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for (auto Ty : {v32s8, v16s16, v8s32, v4s64, v16s8, v8s16, v4s32, v2s64}) {
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setAction({G_INSERT, 1, Ty}, Legal);
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setAction({G_EXTRACT, Ty}, Legal);
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}
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/************ VLX *******************/
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if (!Subtarget.hasVLX())
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return;
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for (auto Ty : {v4s32, v8s32})
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setAction({G_MUL, Ty}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoAVX512DQ() {
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if (!(Subtarget.hasAVX512() && Subtarget.hasDQI()))
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return;
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const LLT v8s64 = LLT::vector(8, 64);
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setAction({G_MUL, v8s64}, Legal);
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/************ VLX *******************/
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if (!Subtarget.hasVLX())
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return;
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const LLT v2s64 = LLT::vector(2, 64);
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const LLT v4s64 = LLT::vector(4, 64);
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for (auto Ty : {v2s64, v4s64})
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setAction({G_MUL, Ty}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoAVX512BW() {
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if (!(Subtarget.hasAVX512() && Subtarget.hasBWI()))
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return;
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const LLT v64s8 = LLT::vector(64, 8);
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const LLT v32s16 = LLT::vector(32, 16);
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for (unsigned BinOp : {G_ADD, G_SUB})
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for (auto Ty : {v64s8, v32s16})
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setAction({BinOp, Ty}, Legal);
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setAction({G_MUL, v32s16}, Legal);
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/************ VLX *******************/
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if (!Subtarget.hasVLX())
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return;
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const LLT v8s16 = LLT::vector(8, 16);
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const LLT v16s16 = LLT::vector(16, 16);
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for (auto Ty : {v8s16, v16s16})
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setAction({G_MUL, Ty}, Legal);
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}
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