forked from OSchip/llvm-project
101 lines
2.9 KiB
LLVM
101 lines
2.9 KiB
LLVM
; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 -arm-disable-cgp=false -mattr=-use-misched %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
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; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
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; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
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; CHECK-COMMON-LABEL: eq_sgt
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; CHECK-NODSP: add
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; CHECK-NODSP: uxtb
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; CHECK-NODSP: sxtb
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; CHECK-NODSP: cmp
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; CHECK-NODSP: sub
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; CHECK-NODSP: sxtb
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; CHECK-NODSP: cmp
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; CHECK-DSP: add
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; CHECK-DSP: uxtb
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; CHECK-DSP: cmp
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; CHECK-DSP: sxtb
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; CHECK-DSP: sub
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; CHECK-DSP: sxtb
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; CHECK-DSP: cmp
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; CHECK-DSP-IMM: uadd8 [[ADD:r[0-9]+]],
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; CHECK-DSP-IMM: cmp [[ADD]],
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; CHECK-DSP-IMM: sxtb [[SEXT0:r[0-9]+]], [[ADD]]
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; CHECK-DSP-IMM: usub8 [[SUB:r[0-9]+]],
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; CHECK-DSP-IMM: sxtb [[SEXT1:r[0-9]+]], [[SUB]]
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; CHECK-DSP-IMM: cmp [[SEXT1]], [[SEXT0]]
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define i8 @eq_sgt(i8* %x, i8 *%y, i8 zeroext %z) {
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entry:
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%load0 = load i8, i8* %x, align 1
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%load1 = load i8, i8* %y, align 1
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%add = add i8 %load0, %z
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%sub = sub i8 %load1, 1
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%cmp = icmp eq i8 %add, 200
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%cmp1 = icmp sgt i8 %sub, %add
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%res0 = select i1 %cmp, i8 35, i8 47
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%res1 = select i1 %cmp1, i8 %res0, i8 %sub
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ret i8 %res1
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}
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; CHECK-COMMON-LABEL: ugt_slt
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; CHECK-NODSP: sub
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; CHECK-NODSP: sxth
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; CHECK-NODSP: uxth
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; CHECK-NODSP: add
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; CHECK-NODSP: sxth
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; CHECK-NODSP: cmp
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; CHECK-NODSP: cmp
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; CHECK-DSP: sxth [[ARG:r[0-9]+]], r2
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; CHECK-DSP: subs [[SUB:r[0-9]+]],
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; CHECK-DSP: uadd16 [[ADD:r[0-9]+]],
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; CHECK-DSP: sxth.w [[SEXT:r[0-9]+]], [[ADD]]
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; CHECK-DSP: cmp [[SEXT]], [[ARG]]
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; CHECK-DSP-NOT: uxt
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; CHECK-DSP: cmp [[SUB]], r2
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define i16 @ugt_slt(i16 *%x, i16 zeroext %y, i16 zeroext %z) {
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entry:
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%load0 = load i16, i16* %x, align 1
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%add = add i16 %load0, %z
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%sub = sub i16 %y, 1
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%cmp = icmp slt i16 %add, %z
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%cmp1 = icmp ugt i16 %sub, %z
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%res0 = select i1 %cmp, i16 35, i16 -1
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%res1 = select i1 %cmp1, i16 %res0, i16 0
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ret i16 %res1
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}
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; CHECK-COMMON-LABEL: urem_trunc_icmps
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; CHECK-COMMON-NOT: uxt
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; CHECK-COMMON: sxtb [[SEXT:r[0-9]+]],
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; CHECK-COMMON: cmp [[SEXT]], #7
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define void @urem_trunc_icmps(i16** %in, i32* %g, i32* %k) {
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entry:
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%ptr = load i16*, i16** %in, align 4
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%ld = load i16, i16* %ptr, align 2
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%cmp.i = icmp eq i16 %ld, 0
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br i1 %cmp.i, label %exit, label %cond.false.i
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cond.false.i:
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%rem = urem i16 5, %ld
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%extract.t = trunc i16 %rem to i8
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br label %body
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body:
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%cond.in.i.off0 = phi i8 [ %extract.t, %cond.false.i ], [ %add, %for.inc ]
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%cmp = icmp sgt i8 %cond.in.i.off0, 7
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%conv5 = zext i1 %cmp to i32
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store i32 %conv5, i32* %g, align 4
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%.pr = load i32, i32* %k, align 4
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%tobool13150 = icmp eq i32 %.pr, 0
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br i1 %tobool13150, label %for.inc, label %exit
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for.inc:
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%add = add nuw i8 %cond.in.i.off0, 1
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br label %body
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exit:
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ret void
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}
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