llvm-project/llvm/test/CodeGen/Hexagon/postinc-baseoffset.mir

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# RUN: llc -march=hexagon -start-before hexagon-packetizer %s -o - | FileCheck %s
# Check that we don't packetize these two instructions together. It happened
# earlier because "offset" in the post-increment instruction was taken to be 8.
# CHECK: memw(r0+#0) = #-1
# CHECK: }
# CHECK: {
# CHECK: r1 = memw(r0++#8)
--- |
define void @fred(i32* %a) { ret void }
...
---
name: fred
tracksRegLiveness: true
body: |
bb.0:
liveins: %r0
S4_storeiri_io %r0, 0, -1 :: (store 4 into %ir.a)
%r1, %r0 = L2_loadri_pi %r0, 8 :: (load 4 from %ir.a)