forked from OSchip/llvm-project
162 lines
4.7 KiB
YAML
162 lines
4.7 KiB
YAML
# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-shrink-instructions -o - %s | FileCheck -check-prefix=GCN %s
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--- |
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define amdgpu_kernel void @fold_fi_vgpr() {
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%alloca = alloca [4 x i32]
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ret void
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}
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define amdgpu_kernel void @fold_vgpr_fi() {
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%alloca = alloca [4 x i32]
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ret void
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}
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define amdgpu_kernel void @fold_sgpr_fi() {
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%alloca = alloca [4 x i32]
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ret void
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}
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define amdgpu_kernel void @fold_fi_sgpr() {
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%alloca = alloca [4 x i32]
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ret void
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}
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define amdgpu_kernel void @fold_fi_imm() {
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%alloca = alloca [4 x i32]
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ret void
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}
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define amdgpu_kernel void @fold_imm_fi() {
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%alloca = alloca [4 x i32]
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ret void
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}
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...
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# GCN-LABEL: name: fold_fi_vgpr{{$}}
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# GCN: %1 = IMPLICIT_DEF
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# GCN: %2 = V_ADD_I32_e32 %stack.0.alloca, %1, implicit-def %vcc, implicit %exec
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name: fold_fi_vgpr
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vgpr_32 }
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- { id: 1, class: vgpr_32 }
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- { id: 2, class: vgpr_32 }
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stack:
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- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
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callee-saved-register: '', local-offset: 0, di-variable: '', di-expression: '',
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di-location: '' }
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body: |
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bb.0:
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%0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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%1 = IMPLICIT_DEF
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%2, %vcc = V_ADD_I32_e64 %0, %1, implicit %exec
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S_ENDPGM
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...
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# GCN-LABEL: name: fold_vgpr_fi{{$}}
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# GCN: %1 = IMPLICIT_DEF
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# GCN: %2 = V_ADD_I32_e32 %stack.0.alloca, %1, implicit-def %vcc, implicit %exec
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name: fold_vgpr_fi
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vgpr_32 }
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- { id: 1, class: vgpr_32 }
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- { id: 2, class: vgpr_32 }
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stack:
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- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
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callee-saved-register: '', local-offset: 0, di-variable: '', di-expression: '',
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di-location: '' }
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body: |
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bb.0:
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%0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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%1 = IMPLICIT_DEF
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%2, %vcc = V_ADD_I32_e64 %1, %0, implicit %exec
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S_ENDPGM
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...
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# GCN-LABEL: name: fold_sgpr_fi{{$}}
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# GCN: %0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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# GCN: %1 = IMPLICIT_DEF
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# GCN: %2 = V_ADD_I32_e32 %1, %0, implicit-def %vcc, implicit %exec
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name: fold_sgpr_fi
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vgpr_32 }
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- { id: 1, class: sgpr_32 }
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- { id: 2, class: vgpr_32 }
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stack:
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- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
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callee-saved-register: '', local-offset: 0, di-variable: '', di-expression: '',
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di-location: '' }
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body: |
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bb.0:
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%0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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%1 = IMPLICIT_DEF
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%2, %vcc = V_ADD_I32_e64 %1, %0, implicit %exec
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S_ENDPGM
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...
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# GCN-LABEL: name: fold_fi_sgpr{{$}}
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# GCN: %0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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# GCN: %1 = IMPLICIT_DEF
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# GCN: %2 = V_ADD_I32_e32 %1, %0, implicit-def %vcc, implicit %exec
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name: fold_fi_sgpr
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vgpr_32 }
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- { id: 1, class: sgpr_32 }
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- { id: 2, class: vgpr_32 }
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stack:
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- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
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callee-saved-register: '', local-offset: 0, di-variable: '', di-expression: '',
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di-location: '' }
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body: |
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bb.0:
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%0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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%1 = IMPLICIT_DEF
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%2, %vcc = V_ADD_I32_e64 %0, %1, implicit %exec
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S_ENDPGM
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...
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# TODO: Should probably prefer folding immediate first
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# GCN-LABEL: name: fold_fi_imm{{$}}
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# GCN: %1 = V_MOV_B32_e32 999, implicit %exec
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# GCN: %2 = V_ADD_I32_e32 %stack.0.alloca, %1, implicit-def %vcc, implicit %exec
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name: fold_fi_imm
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vgpr_32 }
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- { id: 1, class: vgpr_32 }
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- { id: 2, class: vgpr_32 }
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stack:
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- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
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callee-saved-register: '', local-offset: 0, di-variable: '', di-expression: '',
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di-location: '' }
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body: |
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bb.0:
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%0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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%1 = V_MOV_B32_e32 999, implicit %exec
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%2, %vcc = V_ADD_I32_e64 %0, %1, implicit %exec
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S_ENDPGM
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...
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# GCN-LABEL: name: fold_imm_fi{{$}}
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# GCN: %0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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# GCN: %2 = V_ADD_I32_e32 999, %0, implicit-def %vcc, implicit %exec
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name: fold_imm_fi
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vgpr_32 }
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- { id: 1, class: vgpr_32 }
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- { id: 2, class: vgpr_32 }
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stack:
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- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
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callee-saved-register: '', local-offset: 0, di-variable: '', di-expression: '',
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di-location: '' }
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body: |
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bb.0:
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%0 = V_MOV_B32_e32 %stack.0.alloca, implicit %exec
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%1 = V_MOV_B32_e32 999, implicit %exec
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%2, %vcc = V_ADD_I32_e64 %1, %0, implicit %exec
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S_ENDPGM
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