forked from OSchip/llvm-project
118 lines
4.5 KiB
LLVM
118 lines
4.5 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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declare i16 @llvm.bitreverse.i16(i16) #1
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declare i32 @llvm.bitreverse.i32(i32) #1
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declare i64 @llvm.bitreverse.i64(i64) #1
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declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>) #1
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declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) #1
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declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1
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declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1
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; FUNC-LABEL: {{^}}s_brev_i16:
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; SI: s_brev_b32
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define amdgpu_kernel void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 {
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%brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
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store i16 %brev, i16 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_brev_i16:
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; SI: v_bfrev_b32_e32
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define amdgpu_kernel void @v_brev_i16(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %valptr) #0 {
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%val = load i16, i16 addrspace(1)* %valptr
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%brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
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store i16 %brev, i16 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_brev_i32:
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; SI: s_load_dword [[VAL:s[0-9]+]],
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; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]]
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; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
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; SI: buffer_store_dword [[VRESULT]],
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; SI: s_endpgm
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define amdgpu_kernel void @s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) #0 {
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%brev = call i32 @llvm.bitreverse.i32(i32 %val) #1
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store i32 %brev, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_brev_i32:
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; SI: {{buffer|flat}}_load_dword [[VAL:v[0-9]+]],
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; SI: v_bfrev_b32_e32 [[RESULT:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[RESULT]],
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; SI: s_endpgm
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define amdgpu_kernel void @v_brev_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep = getelementptr i32, i32 addrspace(1)* %valptr, i32 %tid
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%val = load i32, i32 addrspace(1)* %gep
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%brev = call i32 @llvm.bitreverse.i32(i32 %val) #1
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store i32 %brev, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_brev_v2i32:
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; SI: s_brev_b32
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; SI: s_brev_b32
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define amdgpu_kernel void @s_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> %val) #0 {
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%brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1
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store <2 x i32> %brev, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_brev_v2i32:
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; SI: v_bfrev_b32_e32
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; SI: v_bfrev_b32_e32
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define amdgpu_kernel void @v_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %valptr, i32 %tid
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%val = load <2 x i32>, <2 x i32> addrspace(1)* %gep
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%brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1
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store <2 x i32> %brev, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_brev_i64:
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define amdgpu_kernel void @s_brev_i64(i64 addrspace(1)* noalias %out, i64 %val) #0 {
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%brev = call i64 @llvm.bitreverse.i64(i64 %val) #1
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store i64 %brev, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_brev_i64:
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; SI-NOT: v_or_b32_e64 v{{[0-9]+}}, 0, 0
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define amdgpu_kernel void @v_brev_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %valptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep = getelementptr i64, i64 addrspace(1)* %valptr, i32 %tid
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%val = load i64, i64 addrspace(1)* %gep
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%brev = call i64 @llvm.bitreverse.i64(i64 %val) #1
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store i64 %brev, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_brev_v2i64:
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define amdgpu_kernel void @s_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %val) #0 {
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%brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1
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store <2 x i64> %brev, <2 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_brev_v2i64:
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define amdgpu_kernel void @v_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %valptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep = getelementptr <2 x i64> , <2 x i64> addrspace(1)* %valptr, i32 %tid
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%val = load <2 x i64>, <2 x i64> addrspace(1)* %gep
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%brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1
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store <2 x i64> %brev, <2 x i64> addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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