llvm-project/llvm/test/CodeGen
Jinsong Ji 816ad48c82 [NFC][RUIP] Small debug output refine
Add a new line, so that we always print MI in a new line,
before and after UpdateRegMask, for easier check..
2020-03-24 03:29:45 +00:00
..
AArch64 [GlobalISel] Combine G_SELECTs of the form (cond ? x : x) into x 2020-03-23 16:46:03 -07:00
AMDGPU [GlobalISel] Add generic opcodes for saturating add/subtract 2020-03-23 15:16:45 +00:00
ARC
ARM [NFC][ARM] Fix for buildbots 2020-03-19 15:50:13 +00:00
AVR [AVR] Fix incorrect register state for LDRdPtr 2020-03-03 17:34:54 +08:00
BPF [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
Generic [NFC] Add missing REQUIRES clause to a test 2020-03-18 16:35:10 +03:00
Hexagon [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
Inputs
Lanai Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
MIR [AMDGPU] Move frame pointer from s34 to s33 2020-03-19 15:35:16 -04:00
MSP430
Mips [GlobalISel] combine G_TRUNC with G_MERGE_VALUES 2020-03-16 14:42:01 +01:00
NVPTX ARM: Fixup some tests using denormal-fp-math attribute 2020-03-10 14:02:06 -04:00
PowerPC [PowerPC] Improve handling of some BUILD_VECTOR nodes 2020-03-23 17:34:29 -05:00
RISCV [RISCV] Select +0.0 immediate using fmv.{w,d}.x / fcvt.d.w 2020-03-20 09:42:24 +00:00
SPARC [Sparc] Fix incorrect operand for matching CMPri pattern 2020-03-02 11:36:32 +08:00
SystemZ [NFC][RUIP] Small debug output refine 2020-03-24 03:29:45 +00:00
Thumb [DAGCombine] Skip PostInc combine with later users 2020-03-23 08:39:53 +00:00
Thumb2 [ARM] Extra VMOVN and VMULL tests. NFC 2020-03-23 16:18:49 +00:00
VE [VE] Target-specific bit size for sjljehprepare 2020-03-10 17:51:16 +01:00
WebAssembly [WebAssembly] Support swiftself and swifterror for WebAssembly target 2020-03-19 17:39:52 -07:00
WinCFGuard
WinEH
X86 [Win64] Insert int3 into trailing empty BBs 2020-03-23 08:50:37 -07:00
XCore [XCore] Add instruction pattern for bitrev 2020-02-21 09:28:49 +08:00