forked from OSchip/llvm-project
101 lines
3.1 KiB
ArmAsm
101 lines
3.1 KiB
ArmAsm
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
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// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOVI
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.globl global
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.globl gds
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// Parse a global expression
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s_mov_b32 s0, global
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// VI: s_mov_b32 s0, global ; encoding: [0xff,0x00,0x80,0xbe,A,A,A,A]
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// VI-NEXT: ; fixup A - offset: 4, value: global, kind: FK_PCRel_4
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// Use a token with the same name as a global
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ds_gws_init v2 gds
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// VI: ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd9,0x00,0x02,0x00,0x00]
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// Use a global with the same name as a token
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s_mov_b32 s0, gds
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// VI: s_mov_b32 s0, gds ; encoding: [0xff,0x00,0x80,0xbe,A,A,A,A]
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// VI-NEXT: ; fixup A - offset: 4, value: gds, kind: FK_PCRel_4
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// Use a binary expression
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s_mov_b32 s0, gds+4
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// VI: s_mov_b32 s0, gds+4 ; encoding: [0xff,0x00,0x80,0xbe,A,A,A,A]
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// VI-NEXT: ; fixup A - offset: 4, value: gds+4, kind: FK_PCRel_4
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// Consecutive instructions with no blank line in between to make sure we
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// don't call Lex() too many times.
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s_add_u32 s0, s0, global+4
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s_addc_u32 s1, s1, 0
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// VI: s_add_u32 s0, s0, global+4
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// VI: s_addc_u32 s1, s1, 0
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// Use a computed expression that results in an inline immediate.
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.set foo, 4
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s_mov_b32 s0, foo+2
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// VI: s_mov_b32 s0, 6 ; encoding: [0x86,0x00,0x80,0xbe]
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// Use a computed expression that results in a non-inline immediate.
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.set foo, 512
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s_mov_b32 s0, foo+2
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// VI: s_mov_b32 s0, 514 ; encoding: [0xff,0x00,0x80,0xbe,0x02,0x02,0x00,0x00]
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BB1:
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v_nop_e64
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BB2:
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s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1
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// VI: s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1 ; encoding: [0x6a,0xff,0xea,0x80,A,A,A,A]
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// VI-NEXT: ; fixup A - offset: 4, value: (BB2+4)-BB1, kind: FK_Data_4
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t=1
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s_sub_u32 s0, s0, -t
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// VI: s_sub_u32 s0, s0, -1 ; encoding: [0x00,0xc1,0x80,0x80]
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t=-1
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s_sub_u32 s0, s0, -t
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// VI: s_sub_u32 s0, s0, 1 ; encoding: [0x00,0x81,0x80,0x80]
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s_sub_u32 s0, s0, -2+1
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// VI: s_sub_u32 s0, s0, -1 ; encoding: [0x00,0xc1,0x80,0x80]
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t=1
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s_sub_u32 s0, s0, -2+t
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// VI: s_sub_u32 s0, s0, -1 ; encoding: [0x00,0xc1,0x80,0x80]
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s_sub_u32 s0, s0, -1.0 + 10000000000
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// NOVI: error: invalid operand for instruction
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t=10000000000
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s_sub_u32 s0, s0, 1.0 + t
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// NOVI: error: invalid operand for instruction
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//===----------------------------------------------------------------------===//
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// Symbols may look like registers.
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// They should be allowed in expressions if there is no ambiguity.
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//===----------------------------------------------------------------------===//
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v=1
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v_sin_f32 v0, -v
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// NOVI: error: invalid operand for instruction
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v=1
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v_sin_f32 v0, -v[0]
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// VI: v_sin_f32_e64 v0, -v0 ; encoding: [0x00,0x00,0x69,0xd1,0x00,0x01,0x00,0x20]
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s=1
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s_not_b32 s0, -s
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// VI: s_not_b32 s0, -1 ; encoding: [0xc1,0x04,0x80,0xbe]
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s0=1
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s_not_b32 s0, -s0
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// VI: s_not_b32 s0, -1 ; encoding: [0xc1,0x04,0x80,0xbe]
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ttmp=1
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s_not_b32 s0, -ttmp
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// VI: s_not_b32 s0, -1 ; encoding: [0xc1,0x04,0x80,0xbe]
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ttmp0=1
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s_not_b32 s0, -[ttmp0]
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// VI: s_not_b32 s0, -1 ; encoding: [0xc1,0x04,0x80,0xbe]
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