llvm-project/llvm/lib/CodeGen/SelectionDAG
Sanjay Patel e767bf4468 [DAGCombiner] re-enable truncation of binops
This is effectively re-committing the changes from:
rL347917 (D54640)
rL348195 (D55126)
...which were effectively reverted here:
rL348604
...because the code had a bug that could induce infinite looping
or eventual out-of-memory compilation.

The bug was that this code did not guard against transforming
opaque constants. More details are in the post-commit mailing
list thread for r347917. A reduced test for that is included
in the x86 bool-math.ll file. (I wasn't able to reduce a PPC
backend test for this, but it was almost the same pattern.)

Original commit message for r347917:

The motivating case for this is shown in:
https://bugs.llvm.org/show_bug.cgi?id=32023
and the corresponding rot16.ll regression tests.

Because x86 scalar shift amounts are i8 values, we can end up with trunc-binop-trunc
sequences that don't get folded in IR.

As the TODO comments suggest, there will be regressions if we extend this (for x86,
we mostly seem to be missing LEA opportunities, but there are likely vector folds
missing too). I think those should be considered existing bugs because this is the
same transform that we do as an IR canonicalization in instcombine. We just need
more tests to make those visible independent of this patch.

llvm-svn: 348706
2018-12-08 16:07:38 +00:00
..
CMakeLists.txt Remove trailing whitespace to trigger re-cmaking 2017-10-02 21:54:38 +00:00
DAGCombiner.cpp [DAGCombiner] re-enable truncation of binops 2018-12-08 16:07:38 +00:00
FastISel.cpp Add support for llvm.is.constant intrinsic (PR4898) 2018-11-07 15:24:12 +00:00
FunctionLoweringInfo.cpp AMDGPU: Fix various issues around the VirtReg2Value mapping 2018-11-30 22:55:29 +00:00
InstrEmitter.cpp [ARM] Make InstrEmitter mark CPSR defs dead for Thumb1. 2018-10-26 19:32:24 +00:00
InstrEmitter.h [DebugInfo] Convert intrinsic llvm.dbg.label to MachineInstr. 2018-05-09 02:41:08 +00:00
LLVMBuild.txt
LegalizeDAG.cpp [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467) 2018-12-05 11:12:12 +00:00
LegalizeFloatTypes.cpp [NFC] Rename minnan and maxnan to minimum and maximum 2018-10-24 22:49:55 +00:00
LegalizeIntegerTypes.cpp [SelectionDAG] Support result type promotion for FLT_ROUNDS_ 2018-11-30 13:18:33 +00:00
LegalizeTypes.cpp [DAG] Don't map a TableId to itself in the ReplacedValues map 2018-06-20 16:06:09 +00:00
LegalizeTypes.h [SelectionDAG] Support result type promotion for FLT_ROUNDS_ 2018-11-30 13:18:33 +00:00
LegalizeTypesGeneric.cpp [LegalizeTypes] Fix bad indentation. NFC 2018-09-23 21:17:55 +00:00
LegalizeVectorOps.cpp [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467) 2018-12-05 11:12:12 +00:00
LegalizeVectorTypes.cpp [LegalizeVectorTypes][X86][ARM][AArch64][PowerPC] Don't use SplitVecOp_TruncateHelper for FP_TO_SINT/UINT. 2018-11-26 21:12:39 +00:00
ResourcePriorityQueue.cpp Silence a bunch of implicit fallthrough warnings 2017-12-19 22:05:25 +00:00
SDNodeDbgValue.h SelectionDAG: Add compact SDDbgValue representation to -dag-dump-verbose output 2018-09-14 17:08:02 +00:00
ScheduleDAGFast.cpp ScheduleDAG: Cleanup dumping code; NFC 2018-09-19 00:23:35 +00:00
ScheduleDAGRRList.cpp ScheduleDAG: Cleanup dumping code; NFC 2018-09-19 00:23:35 +00:00
ScheduleDAGSDNodes.cpp llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...) 2018-09-27 02:13:45 +00:00
ScheduleDAGSDNodes.h ScheduleDAG: Cleanup dumping code; NFC 2018-09-19 00:23:35 +00:00
ScheduleDAGVLIW.cpp ScheduleDAG: Cleanup dumping code; NFC 2018-09-19 00:23:35 +00:00
SelectionDAG.cpp [SelectionDAG] Remove ISD::ADDC/ADDE from some undef handling code in getNode. NFCI 2018-12-08 00:27:34 +00:00
SelectionDAGAddressAnalysis.cpp [SelectionDAG] Teach BaseIndexOffset::match to unwrap the base after looking through an add/or 2018-11-26 20:16:33 +00:00
SelectionDAGBuilder.cpp Follow-up from r348441 to add the rest of the objc ARC intrinsics. 2018-12-07 21:28:47 +00:00
SelectionDAGBuilder.h [IR] Add a dedicated FNeg IR Instruction 2018-11-13 18:15:47 +00:00
SelectionDAGDumper.cpp [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467) 2018-12-05 11:12:12 +00:00
SelectionDAGISel.cpp TableGen/ISel: Allow PatFrag predicate code to access captured operands 2018-11-30 14:15:13 +00:00
SelectionDAGPrinter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
SelectionDAGTargetInfo.cpp [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-09-13 21:15:20 +00:00
StatepointLowering.cpp [CodeGen] Prefer static frame index for STATEPOINT liveness args 2018-11-30 16:22:41 +00:00
StatepointLowering.h [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to CodeGen layer. 2018-03-29 17:21:10 +00:00
TargetLowering.cpp [TargetLowering] Remove ISD::ANY_EXTEND/ANY_EXTEND_VECTOR_INREG opcodes from SimplifyDemandedVectorElts 2018-12-05 12:20:05 +00:00