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llvm-project/mlir
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William S. Moses 30d87d4a5d [MLIR][LLVM] Permit integer types in switch other than i32 
LLVM switchop currently only permits i32. Both LLVM IR and MLIR Standard switch permit other integer types leading to an illegal state when lowering an i8 switch from MLIR standard

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D113955
 		2021-11-16 12:00:37 -05:00
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cmake/modules Re-apply "[mlir] Allow out-of-tree python building from installed MLIR." 2021-11-14 20:31:34 -08:00
docs [mlir-tblgen] Support `either` in Tablegen DRR. 2021-11-08 23:16:03 +00:00
examples Re-apply "[mlir] Allow out-of-tree python building from installed MLIR." 2021-11-14 20:31:34 -08:00
include [MLIR][LLVM] Permit integer types in switch other than i32 2021-11-16 12:00:37 -05:00
lib [MLIR][LLVM] Permit integer types in switch other than i32 2021-11-16 12:00:37 -05:00
python [mlir] Move min/max ops from Std to Arith. 2021-11-15 13:19:17 +01:00
test [MLIR][LLVM] Permit integer types in switch other than i32 2021-11-16 12:00:37 -05:00
tools [mlir][ods] Fix unused uniqued attr constraint 2021-11-14 23:23:14 +00:00
unittests [MLIR] FlatAffineConstraints: Allow extraction of explicit representation of local variables 2021-11-16 14:51:06 +05:30
utils [mlir] gen_spirv_dialect.py: Some support for OCL ops generation 2021-10-27 14:54:47 +03:00
.clang-format
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.clang-tidy NFC: .clang-tidy: Inherit configs from parents to improve maintainability 2021-06-08 08:25:59 -07:00
CMakeLists.txt [mlir] Add MLIR-C dylib. 2021-11-11 22:58:13 -08:00
LICENSE.TXT
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README.md
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README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.