llvm-project/llvm
Craig Topper e72fe654b7 [DAGCombiner] Use getShiftAmountConstant in DAGCombiner::foldSelectOfConstants.
This enables fshl to be matched earlier on X86

  %6 = lshr i32 %3, 1
  %7 = select i1 %4, i32 -2147483648, i32 0
  %8 = or i32 %6, %7

X86 uses i8 for shift amounts. SelectionDAGBuilder creates the
ISD::SRL with an i8 shift type. DAGCombiner turns the select into
an ISD::SHL. Prior to this patch it would use i32 for the shift
amount. fshl matching failed because the shift amounts have different
types. LegalizeDAG fixes the ISD::SHL shift amount to i8. This
allowed fshl matching to succeed.

With this patch, the ISD::SHL will be created with an i8 shift
amount. This allows the fshl to match immediately.

No test case beause we still end up with a fshl either way.
2022-02-13 19:09:26 -08:00
..
benchmarks
bindings
cmake [llvm] [cmake] Fix finding modern ounit2 2022-02-12 13:45:17 +01:00
docs [llvm][doc] Add Aarch64 to list of architectures supporting statepoints 2022-02-13 20:35:15 +01:00
examples Cleanup header dependencies in LLVMCore 2022-02-02 06:54:20 +01:00
include [IR] Use default member initialization in IRBuilderBase (NFC) 2022-02-13 10:34:05 -08:00
lib [DAGCombiner] Use getShiftAmountConstant in DAGCombiner::foldSelectOfConstants. 2022-02-13 19:09:26 -08:00
projects
resources
runtimes [llvm] add missing word in a comment 2022-02-10 20:57:13 -05:00
test [IVDescriptors] Support FOR where we have multiple sink pointed 2022-02-14 09:30:35 +08:00
tools [ObjectYAML][MachO] Add LC_FUNCTION_STARTS support 2022-02-13 09:24:47 -08:00
unittests Adding DiBuilder interface for assumed length strings 2022-02-11 14:40:02 -05:00
utils [libc++] Remove <experimental/filesystem> header 2022-02-12 19:43:57 -05:00
.clang-format
.clang-tidy
.gitattributes
.gitignore
CMakeLists.txt Bump the trunk major version to 15 2022-02-01 23:54:52 -08:00
CODE_OWNERS.TXT [LoongArch 1/6] Add triples loongarch{32,64} for the upcoming LoongArch target 2022-02-10 10:23:34 +00:00
CREDITS.TXT
LICENSE.TXT
README.txt
RELEASE_TESTERS.TXT
configure
llvm.spec.in

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