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llvm-project/llvm/test/MC
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Thomas Lively 6f21a13675 [WebAssembly] Add V128 value type to binary format 
Summary: Adds the necessary support to lib/ObjectYAML and fixes SIMD
calls to allow the tests to work. Also removes some dead code that
would otherwise have to have been updated.

Reviewers: aheejin, dschuff, sbc100

Subscribers: jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52105

llvm-svn: 342689
 		2018-09-20 22:04:44 +00:00
..
AArch64 [AArch64] Attempt to parse more operands as expressions 2018-09-18 09:44:53 +00:00
AMDGPU AMDGPU: Print all kernel descriptor directives (including the ones with default values) 2018-09-12 20:25:39 +00:00
ARM Fix for bug 34002 - label generated before it block is finalized. Differential Revision: https://reviews.llvm.org/D52258 2018-09-20 05:11:42 +00:00
AVR [AVR] Redefine the 'SBR' instruction as an alias 2018-09-01 12:22:54 +00:00
AsmParser [debuginfo] generate debug info with asm+.file 2018-08-28 16:23:39 +00:00
BPF bpf: New disassembler testcases for 32-bit subregister support 2018-02-23 23:49:35 +00:00
COFF [codeview] Add .cv_string directive for testing purposes 2018-09-07 21:30:52 +00:00
Disassembler [RISCV] Fix decoding of invalid instruction with C extension enabled. 2018-09-13 18:21:19 +00:00
ELF The initial .text section generated in object files was missing the 2018-09-06 22:09:31 +00:00
Hexagon Check for tied operands 2018-08-13 14:01:25 +00:00
Lanai
…
MachO [MC/Dwarf] Unclamp DWARF linetables format on Darwin. 2018-09-13 13:13:50 +00:00
Mips [mips] Fix MIPS N32 ABI triples support 2018-09-17 21:21:57 +00:00
PowerPC [MC] Avoid inlining constant symbols with variants. 2018-09-17 20:34:26 +00:00
RISCV [RISCV][MC] Improve parsing of jal/j operands 2018-09-20 08:10:35 +00:00
Sparc [Sparc] allow tls_add/tls_call syntax in assembler parser 2018-09-03 10:38:12 +00:00
SystemZ [SystemZ, AsmParser] Enable the mnemonic spell corrector. 2017-07-18 09:17:00 +00:00
WebAssembly [WebAssembly] Add V128 value type to binary format 2018-09-20 22:04:44 +00:00
X86 [X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives. 2018-09-06 02:03:14 +00:00