llvm-project/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir

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# RUN: llc -start-before=livedebugvalues -filetype=obj -o - %s | \
# RUN: llvm-dwarfdump - | FileCheck %s
# CHECK: .debug_info contents:
# CHECK: DW_TAG_variable
# CHECK-NEXT: DW_AT_location
# CHECK-NEXT: [0x00000010, 0x00000018): DW_OP_regx D0, DW_OP_piece 0x8, DW_OP_regx D1, DW_OP_piece 0x8)
# CHECK-NEXT: DW_AT_name {{.*}}"vec"
--- |
; Generated from:
; typedef float vec2 __attribute__((vector_size(16)));
; vec2 v();
; float f() {
; vec2 vec = v();
; return vec[0] + vec[1];
; }
target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
target triple = "thumbv7s-apple-ios5.0.0"
define float @f() local_unnamed_addr #0 !dbg !9 {
entry:
%call = tail call <4 x float> bitcast (<4 x float> (...)* @v to <4 x float> ()*)() #0, !dbg !19
tail call void @llvm.dbg.value(metadata <4 x float> %call, i64 0, metadata !14, metadata !20), !dbg !21
%vecext = extractelement <4 x float> %call, i32 0, !dbg !22
%vecext1 = extractelement <4 x float> %call, i32 1, !dbg !23
%add = fadd float %vecext, %vecext1, !dbg !24
ret float %add, !dbg !25
}
declare arm_aapcs_vfpcc <4 x float> @v(...) local_unnamed_addr #0
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
attributes #0 = { nounwind readnone }
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5, !6, !7}
!llvm.ident = !{!8}
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 4.0.0 (trunk 286322) (llvm/trunk 286305)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
!1 = !DIFile(filename: "v.c", directory: "/")
!2 = !{}
!3 = !{i32 2, !"Dwarf Version", i32 2}
!4 = !{i32 2, !"Debug Info Version", i32 3}
!5 = !{i32 1, !"wchar_size", i32 4}
!6 = !{i32 1, !"min_enum_size", i32 4}
!7 = !{i32 1, !"PIC Level", i32 2}
!8 = !{!"clang version 4.0.0 (trunk 286322) (llvm/trunk 286305)"}
!9 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 3, type: !10, isLocal: false, isDefinition: true, scopeLine: 3, isOptimized: true, unit: !0, retainedNodes: !13)
!10 = !DISubroutineType(types: !11)
!11 = !{!12}
!12 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
!13 = !{!14}
!14 = !DILocalVariable(name: "vec", scope: !9, file: !1, line: 4, type: !15)
!15 = !DIDerivedType(tag: DW_TAG_typedef, name: "vec2", file: !1, line: 1, baseType: !16)
!16 = !DICompositeType(tag: DW_TAG_array_type, baseType: !12, size: 128, flags: DIFlagVector, elements: !17)
!17 = !{!18}
!18 = !DISubrange(count: 4)
!19 = !DILocation(line: 4, column: 13, scope: !9)
!20 = !DIExpression()
!21 = !DILocation(line: 4, column: 7, scope: !9)
!22 = !DILocation(line: 5, column: 9, scope: !9)
!23 = !DILocation(line: 5, column: 18, scope: !9)
!24 = !DILocation(line: 5, column: 16, scope: !9)
!25 = !DILocation(line: 5, column: 2, scope: !9)
...
---
name: f
alignment: 1
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
tracksRegLiveness: true
calleeSavedRegisters: [ '$lr', '$d8', '$d9', '$d10', '$d11', '$d12', '$d13',
'$d14', '$d15', '$q4', '$q5', '$q6', '$q7', '$r4',
'$r5', '$r6', '$r7', '$r8', '$r10', '$r11', '$s16',
'$s17', '$s18', '$s19', '$s20', '$s21', '$s22',
'$s23', '$s24', '$s25', '$s26', '$s27', '$s28',
'$s29', '$s30', '$s31', '$d8_d10', '$d9_d11', '$d10_d12',
'$d11_d13', '$d12_d14', '$d13_d15', '$q4_q5', '$q5_q6',
'$q6_q7', '$q4_q5_q6_q7', '$r4_r5', '$r6_r7', '$r10_r11',
'$d8_d9_d10', '$d9_d10_d11', '$d10_d11_d12', '$d11_d12_d13',
'$d12_d13_d14', '$d13_d14_d15', '$d8_d10_d12',
'$d9_d11_d13', '$d10_d12_d14', '$d11_d13_d15',
'$d8_d10_d12_d14', '$d9_d11_d13_d15', '$d9_d10',
'$d11_d12', '$d13_d14', '$d9_d10_d11_d12', '$d11_d12_d13_d14' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 4
offsetAdjustment: 0
maxAlignment: 4
adjustsStack: true
hasCalls: true
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
stack:
- { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '$lr' }
body: |
bb.0.entry:
liveins: $lr
early-clobber $sp = frame-setup t2STR_PRE killed undef $lr, $sp, -4, 14, _
frame-setup CFI_INSTRUCTION def_cfa_offset 4
frame-setup CFI_INSTRUCTION offset $lr, -4
tBL 14, _, @v, csr_ios, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, debug-location !19
$d1 = VMOVDRR killed $r2, killed $r3, 14, _, implicit-def $q0, debug-location !19
$d0 = VMOVDRR killed $r0, killed $r1, 14, _, implicit killed $q0, implicit-def $q0, debug-location !19
DBG_VALUE debug-use $q0, debug-use _, !14, !20, debug-location !21
$s4 = VMOVS $s1, 14, _, implicit-def $d2, debug-location !24
$d0 = VADDfd $d0, killed $d2, 14, _, implicit killed $q0, debug-location !24
$r0 = VMOVRS $s0, 14, _, implicit killed $d0, debug-location !25
$lr, $sp = t2LDR_POST $sp, 4, 14, _, debug-location !25
tBX_RET 14, _, implicit $r0, debug-location !25
...