forked from OSchip/llvm-project
7ab164c4a4
Summary: Targets like ARM, MSP430, PPC, and SystemZ have complex behavior when printing the address of a MachineOperand::MO_GlobalAddress. Move that handling into a new overriden method in each base class. A virtual method was added to the base class for handling the generic case. Refactors a few subclasses to support the target independent %a, %c, and %n. The patch also contains small cleanups for AVRAsmPrinter and SystemZAsmPrinter. It seems that NVPTXTargetLowering is possibly missing some logic to transform GlobalAddressSDNodes for TargetLowering::LowerAsmOperandForConstraint to handle with "i" extended inline assembly asm constraints. Fixes: - https://bugs.llvm.org/show_bug.cgi?id=41402 - https://github.com/ClangBuiltLinux/linux/issues/449 Reviewers: echristo, void Reviewed By: void Subscribers: void, craig.topper, jholewinski, dschuff, jyknight, dylanmckay, sdardis, nemanjai, javed.absar, sbc100, jgravelle-google, eraman, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, jrtc27, atanasyan, jsji, llvm-commits, kees, tpimh, nathanchance, peter.smith, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D60887 llvm-svn: 359337 |
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| .. | ||
| codemodel.ll | ||
| comparisons_i32.ll | ||
| comparisons_i64.ll | ||
| constant_multiply.ll | ||
| delay_filler.ll | ||
| i32.ll | ||
| inlineasm-output-template.ll | ||
| lanai-misched-trivial-disjoint.ll | ||
| lit.local.cfg | ||
| lshift64.ll | ||
| masking_setccs.ll | ||
| mem_alu_combiner.ll | ||
| multiply.ll | ||
| peephole-compare.mir | ||
| rshift64.ll | ||
| select.ll | ||
| set_and_hi.ll | ||
| shift.ll | ||
| stack-frame.ll | ||
| sub-cmp-peephole.ll | ||
| subword.ll | ||