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Simon Tatham e6824160dd [ARM] Add MVE vector load/store instructions.
This adds the rest of the vector memory access instructions. It
includes contiguous loads/stores, with an ordinary addressing mode
such as [r0,#offset] (plus writeback variants); gather loads and
scatter stores with a scalar base address register and a vector of
offsets from it (written [r0,q1] or similar); and gather/scatters with
a vector of base addresses (written [q0,#offset], again with
writeback). Additionally, some of the loads can widen each loaded
value into a larger vector lane, and the corresponding stores narrow
them again.

To implement these, we also have to add the addressing modes they
need. Also, in AsmParser, the `isMem` query function now has
subqueries `isGPRMem` and `isMVEMem`, according to which kind of base
register is used by a given memory access operand.

I've also had to add an extra check in `checkTargetMatchPredicate` in
the AsmParser, without which our last-minute check of `rGPR` register
operands against SP and PC was failing an assertion because Tablegen
had inserted an immediate 0 in place of one of a pair of tied register
operands. (This matches the way the corresponding check for `MCK_rGPR`
in `validateTargetOperandClass` is guarded.) Apparently the MVE load
instructions were the first to have ever triggered this assertion, but
I think only because they were the first to have a combination of the
usual Arm pre/post writeback system and the `rGPR` class in particular.

Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62680

llvm-svn: 364291
2019-06-25 11:24:18 +00:00
clang [clangd] Narrow rename to local symbols. 2019-06-25 08:43:17 +00:00
clang-tools-extra [clangd] Fix NestedNameSpecifierLoc in SelectionTree 2019-06-25 09:36:09 +00:00
compiler-rt [sanitizer] Enabled getpw_getgr.cc on iOS 2019-06-25 01:01:46 +00:00
debuginfo-tests Store a pointer to the return value in a static alloca and let the debugger use that 2019-06-20 17:15:21 +00:00
libclc travis: Add LLVM-8 build 2019-03-27 21:28:31 +00:00
libcxx Fix test failures due to modified wording in Clang diagnostics. 2019-06-24 22:01:03 +00:00
libcxxabi [demangle] Special case clang's creative mangling of __uuidof expressions. 2019-06-18 23:34:09 +00:00
libunwind [libunwind][AArch64] Fix libunwind::Registers_arm64::jumpto 2019-06-17 11:00:21 +00:00
lld Port r363962 to COFF: Deduplicate undefined symbol diagnostics 2019-06-25 09:55:55 +00:00
lldb Remove core loading timeout 2019-06-25 07:14:29 +00:00
llgo IR: Support parsing numeric block ids, and emit them in textual output. 2019-03-22 18:27:13 +00:00
llvm [ARM] Add MVE vector load/store instructions. 2019-06-25 11:24:18 +00:00
openmp [OpenMP][libomptarget] Add support for declare target to clause under unified memory 2019-06-19 15:48:10 +00:00
parallel-libs Fix typos throughout the license files that somehow I and my reviewers 2019-01-21 09:52:34 +00:00
polly [test] Add wrap flags after D61934. 2019-06-17 19:17:07 +00:00
pstl [pstl] Default to the serial backend when unspecified 2019-06-20 17:56:51 +00:00
.arcconfig Update monorepo .arcconfig with new project callsign. 2019-01-31 14:34:59 +00:00
.clang-format Add .clang-tidy and .clang-format files to the toplevel of the 2019-01-29 16:43:16 +00:00
.clang-tidy Disable tidy checks with too many hits 2019-02-01 11:20:13 +00:00
.gitignore Add a reduced copy of the llvm .gitignore 2019-04-09 00:52:49 +00:00
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