forked from OSchip/llvm-project
bb13411614
* Remove misnamed `PPC64_HAS_VMX` in preference of directly checking `defined(__VSX__)`. libunwind was using "VMX" to mean "VSX". "VMX" is just another name for Altivec, while "VSX" is the vector-scalar extensions first used in POWER7. Exposing a "PPC64_HAS_VMX" define was misleading and incorrect. * Add `defined(__ALTIVEC__)` guards around vector register operations to fix non-altivec CPUS such as the e5500. When compiling for certain Book-E processors such as the e5500, we want to skip vector save/restore, as the Altivec registers are illegal on non-Altivec implementations. * Add `!defined(__NO_FPRS__)` guards around traditional floating-point save/restore. When compiling for powerpcspe, we cannot access floating point registers, as there aren't any. (The SPE on e500v2 is a 64-bit extension of the GPRs, and it doesn't have the normal floating-point registers at all.) This fixes building for powerpcspe, although no actual handling for SPE save/restore is written yet. Reviewed By: MaskRay, #libunwind, compnerd Differential Revision: https://reviews.llvm.org/D91906 |
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| CMakeLists.txt | ||
| LICENSE.TXT | ||