forked from OSchip/llvm-project
45 lines
1.7 KiB
LLVM
45 lines
1.7 KiB
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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; XFAIL:
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; Check that the packetizer generates valid packets with constant
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; extended add and base+offset store instructions.
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; CHECK: {
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; CHECK-NEXT: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}, ##{{[0-9]+}})
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; CHECK-NEXT: memw(r{{[0-9]+}}+{{ *}}##{{[0-9]+}}){{ *}}={{ *}}r{{[0-9]+}}.new
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; CHECK-NEXT: }
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define i32 @test(i32* nocapture %a, i32* nocapture %b, i32 %c) nounwind {
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entry:
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%add = add nsw i32 %c, 200002
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%0 = load i32, i32* %a, align 4
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%add1 = add nsw i32 %0, 200000
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%arrayidx2 = getelementptr inbounds i32, i32* %a, i32 3000
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store i32 %add1, i32* %arrayidx2, align 4
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%1 = load i32, i32* %b, align 4
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%add4 = add nsw i32 %1, 200001
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%arrayidx5 = getelementptr inbounds i32, i32* %a, i32 1
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store i32 %add4, i32* %arrayidx5, align 4
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%arrayidx7 = getelementptr inbounds i32, i32* %b, i32 1
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%2 = load i32, i32* %arrayidx7, align 4
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%cmp = icmp sgt i32 %add4, %2
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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%arrayidx8 = getelementptr inbounds i32, i32* %a, i32 2
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%3 = load i32, i32* %arrayidx8, align 4
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%arrayidx9 = getelementptr inbounds i32, i32* %b, i32 2000
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%4 = load i32, i32* %arrayidx9, align 4
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%sub = sub nsw i32 %3, %4
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%arrayidx10 = getelementptr inbounds i32, i32* %a, i32 4000
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store i32 %sub, i32* %arrayidx10, align 4
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br label %if.end
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if.else: ; preds = %entry
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%arrayidx11 = getelementptr inbounds i32, i32* %b, i32 3200
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store i32 %add, i32* %arrayidx11, align 4
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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ret i32 %add
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}
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