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llvm-project/llvm/lib/Target/AMDGPU
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Tom Stellard 2d26fe7aa6 AMDGPU/SI: Fix s_waitcnt insertion for flat instructions 
Summary:
This was broken in r260694 which swapped the address and data operands
for flat store instructions.  The code in SIInsertWaits assumes
that the data operand always comes before the address operand, so
we need to add a special case for flat.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17366

llvm-svn: 261330
 		2016-02-19 15:33:13 +00:00
..
AsmParser Test commit access. 2016-02-18 10:02:12 +00:00
Disassembler [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target 2016-02-18 03:42:32 +00:00
InstPrinter AMDGPU: waitcnt operand fixes 2016-01-28 17:13:44 +00:00
MCTargetDesc Remove autoconf support 2016-01-26 21:29:08 +00:00
TargetInfo Remove autoconf support 2016-01-26 21:29:08 +00:00
Utils Remove autoconf support 2016-01-26 21:29:08 +00:00
AMDGPU.h AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
AMDGPU.td AMDGPU: Set element_size in private resource descriptor 2016-02-12 02:40:47 +00:00
AMDGPUAlwaysInlinePass.cpp AMDGPU: Minor cleanups to always inline pass 2015-07-13 19:08:36 +00:00
AMDGPUAnnotateKernelFeatures.cpp AMDGPU: Stop checking intrinsics not used by HSA for dispatch-ptr 2016-01-30 05:10:59 +00:00
AMDGPUAnnotateUniformValues.cpp AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
AMDGPUAsmPrinter.cpp AMDGPU: Set element_size in private resource descriptor 2016-02-12 02:40:47 +00:00
AMDGPUAsmPrinter.h AMDGPU: Emit note directive for HSA even if there are no functions 2016-01-12 17:18:17 +00:00
AMDGPUCallingConv.td AMDGPU/SI: Add support for non-void functions 2016-01-13 17:23:04 +00:00
AMDGPUFrameLowering.cpp AMDGPU: Fix old comments that mention AMDIL 2016-01-20 21:22:21 +00:00
AMDGPUFrameLowering.h AMDGPU: Create emergency stack slots during frame lowering 2015-11-06 18:17:45 +00:00
AMDGPUISelDAGToDAG.cpp AMDGPU: Cleanup includes and random macros 2016-02-13 01:24:08 +00:00
AMDGPUISelLowering.cpp AMDGPU: Rename intrinsic to better match instruction name 2016-02-13 01:03:00 +00:00
AMDGPUISelLowering.h AMDGPU: Rename intrinsic to better match instruction name 2016-02-13 01:03:00 +00:00
AMDGPUInstrInfo.cpp AMDGPU: Move subtarget specific code out of AMDGPUInstrInfo.cpp 2016-01-28 16:04:37 +00:00
AMDGPUInstrInfo.h AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfo 2016-02-05 18:44:57 +00:00
AMDGPUInstrInfo.td AMDGPU: Rename intrinsic to better match instruction name 2016-02-13 01:03:00 +00:00
AMDGPUInstructions.td [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target 2016-02-18 03:42:32 +00:00
AMDGPUIntrinsicInfo.cpp [llvm-tblgen] Avoid StringMatcher for GCC and MS builtin names 2016-01-27 01:43:12 +00:00
AMDGPUIntrinsicInfo.h
…
AMDGPUIntrinsics.td AMDGPU: Remove bfi and bfm intrinsics 2016-02-08 19:06:01 +00:00
AMDGPUMCInstLower.cpp AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VI 2015-12-21 18:44:27 +00:00
AMDGPUMCInstLower.h
…
AMDGPUMachineFunction.cpp AMDGPU/SI: Add getShaderType() function to Utils/ 2015-12-15 16:26:16 +00:00
AMDGPUMachineFunction.h AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL 2015-11-06 11:45:14 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp AMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass 2015-10-01 21:16:05 +00:00
AMDGPUPromoteAlloca.cpp AMDGPU: Preserve alignments on new created globals 2016-02-05 19:47:23 +00:00
AMDGPURegisterInfo.cpp
…
AMDGPURegisterInfo.h AMDGPU: Remove dead code 2015-09-19 06:41:10 +00:00
AMDGPURegisterInfo.td AMDGPU: Set SubRegIndex size and offset 2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp AMDGPU: Set element_size in private resource descriptor 2016-02-12 02:40:47 +00:00
AMDGPUSubtarget.h AMDGPU: Set element_size in private resource descriptor 2016-02-12 02:40:47 +00:00
AMDGPUTargetMachine.cpp AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
AMDGPUTargetMachine.h AMDGPU: Fix ordering of CPU and FS parameters in TargetMachine constructors 2016-02-05 18:29:17 +00:00
AMDGPUTargetObjectFile.cpp AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA 2015-12-15 22:39:36 +00:00
AMDGPUTargetObjectFile.h AMDGPU/SI: Emit constant arrays in the .text section 2015-12-10 02:13:01 +00:00
AMDGPUTargetTransformInfo.cpp AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
AMDGPUTargetTransformInfo.h AMDGPU: Override getCFInstrCost 2015-12-16 18:37:19 +00:00
AMDILCFGStructurizer.cpp Normalize MBB's successors' probabilities in several locations. 2015-12-13 09:26:17 +00:00
AMDKernelCodeT.h AMDGPU: Set element_size in private resource descriptor 2016-02-12 02:40:47 +00:00
CIInstructions.td [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target 2016-02-18 03:42:32 +00:00
CMakeLists.txt [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target 2016-02-18 03:42:32 +00:00
CaymanInstructions.td AMDGPU: Remove 24-bit intrinsics 2016-01-29 10:05:16 +00:00
EvergreenInstructions.td AMDGPU: Remove 24-bit intrinsics 2016-01-29 10:05:16 +00:00
LLVMBuild.txt [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target 2016-02-18 03:42:32 +00:00
Processors.td AMDGPU/SI: Stoney has only 16 LDS banks 2016-01-27 11:19:45 +00:00
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp Update to use new name alignTo(). 2016-01-14 21:06:47 +00:00
R600Defines.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600ISelLowering.cpp AMDGPU: Rename intrinsic to better match instruction name 2016-02-13 01:03:00 +00:00
R600ISelLowering.h AMDGPU: Split R600 and SI store lowering 2016-02-11 05:32:46 +00:00
R600InstrFormats.td
…
R600InstrInfo.cpp AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfo 2016-02-05 18:44:57 +00:00
R600InstrInfo.h AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfo 2016-02-05 18:44:57 +00:00
R600Instructions.td AMDGPU: Rename intrinsic to better match instruction name 2016-02-13 01:03:00 +00:00
R600Intrinsics.td AMDGPU: Move AMDGPU intrinsics only used by R600 2016-01-26 04:49:24 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp AMDGPU: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:07:10 +00:00
R600Packetizer.cpp [Packetizer] Add AliasAnalysis as a parameter to the packetizer 2015-12-14 20:35:13 +00:00
R600RegisterInfo.cpp
…
R600RegisterInfo.h AMDGPU: Remove dead code 2015-09-19 06:41:10 +00:00
R600RegisterInfo.td
…
R600Schedule.td
…
R600TextureIntrinsicsReplacer.cpp AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix 2016-01-22 19:00:09 +00:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
SIDefines.h AMDGPU/SI: Add new target attribute InitialPSInputAddr 2016-01-13 11:45:36 +00:00
SIFixControlFlowLiveIntervals.cpp AMDGPU: Remove unused includes 2015-09-25 00:28:43 +00:00
SIFixSGPRCopies.cpp AMDGPU/SI: Fold operands with sub-registers 2016-01-07 17:10:29 +00:00
SIFixSGPRLiveRanges.cpp AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
SIFoldOperands.cpp AMDGPU: Fix passes depending on dominator tree for no reason 2016-02-11 06:15:34 +00:00
SIFrameLowering.cpp AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
SIFrameLowering.h AMDGPU: Remove SIPrepareScratchRegs 2015-11-30 21:15:53 +00:00
SIISelLowering.cpp AMDGPU/SI: add llvm.amdgcn.image.load/store[.mip] intrinsics 2016-02-18 16:44:18 +00:00
SIISelLowering.h AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
SIInsertWaits.cpp AMDGPU/SI: Fix s_waitcnt insertion for flat instructions 2016-02-19 15:33:13 +00:00
SIInstrFormats.td [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target 2016-02-18 03:42:32 +00:00
SIInstrInfo.cpp [AMDGPU] Rename $dst operand to $vdst for VOP instructions. 2016-02-16 18:14:56 +00:00
SIInstrInfo.h AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
SIInstrInfo.td AMDGPU/SI: add llvm.amdgcn.image.load/store[.mip] intrinsics 2016-02-18 16:44:18 +00:00
SIInstructions.td AMDGPU/SI: add llvm.amdgcn.image.load/store[.mip] intrinsics 2016-02-18 16:44:18 +00:00
SIIntrinsics.td AMDGPU: Remove old sample intrinsics 2016-01-26 04:38:08 +00:00
SILoadStoreOptimizer.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
SILowerI1Copies.cpp AMDGPU: Fix passes depending on dominator tree for no reason 2016-02-11 06:15:34 +00:00
SIMachineFunctionInfo.cpp AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
SIMachineFunctionInfo.h AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
SIMachineScheduler.cpp RegisterPressure: Make liveness tracking subregister aware 2016-01-20 00:23:26 +00:00
SIMachineScheduler.h RegisterPressure: Make liveness tracking subregister aware 2016-01-20 00:23:26 +00:00
SIRegisterInfo.cpp AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
SIRegisterInfo.h AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
SIRegisterInfo.td AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
SISchedule.td AMDGPU: Improve accuracy of instruction rates for VOPC 2015-09-25 16:58:25 +00:00
SIShrinkInstructions.cpp [AMDGPU] Rename $dst operand to $vdst for VOP instructions. 2016-02-16 18:14:56 +00:00
SITypeRewriter.cpp AMDGPU/SI: Fix crash when inline assembly is used in a graphics shader 2016-01-06 22:01:04 +00:00
VIInstrFormats.td [AMDGPU] Rename $dst operand to $vdst for VOP instructions. 2016-02-16 18:14:56 +00:00
VIInstructions.td [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target 2016-02-18 03:42:32 +00:00