forked from OSchip/llvm-project
56 lines
2.1 KiB
C++
56 lines
2.1 KiB
C++
//===-- SPIRVInstrInfo.h - SPIR-V Instruction Information -------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the SPIR-V implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
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#define LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
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#include "SPIRVRegisterInfo.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#define GET_INSTRINFO_HEADER
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#include "SPIRVGenInstrInfo.inc"
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namespace llvm {
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class SPIRVInstrInfo : public SPIRVGenInstrInfo {
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const SPIRVRegisterInfo RI;
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public:
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SPIRVInstrInfo();
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const SPIRVRegisterInfo &getRegisterInfo() const { return RI; }
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bool isHeaderInstr(const MachineInstr &MI) const;
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bool isConstantInstr(const MachineInstr &MI) const;
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bool isTypeDeclInstr(const MachineInstr &MI) const;
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bool isDecorationInstr(const MachineInstr &MI) const;
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bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify = false) const override;
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unsigned removeBranch(MachineBasicBlock &MBB,
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int *BytesRemoved = nullptr) const override;
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unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
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const DebugLoc &DL,
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int *BytesAdded = nullptr) const override;
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void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
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bool KillSrc) const override;
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bool expandPostRAPseudo(MachineInstr &MI) const override;
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};
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
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