forked from OSchip/llvm-project
76 lines
2.0 KiB
C++
76 lines
2.0 KiB
C++
//===----------------------- MIRNamer.cpp - MIR Namer ---------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// The purpose of this pass is to rename virtual register operands with the goal
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// of making it easier to author easier to read tests for MIR. This pass reuses
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// the vreg renamer used by MIRCanonicalizerPass.
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//
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// Basic Usage:
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//
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// llc -o - -run-pass mir-namer example.mir
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//
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//===----------------------------------------------------------------------===//
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#include "MIRVRegNamerUtils.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/InitializePasses.h"
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using namespace llvm;
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namespace llvm {
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extern char &MIRNamerID;
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} // namespace llvm
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#define DEBUG_TYPE "mir-namer"
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namespace {
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class MIRNamer : public MachineFunctionPass {
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public:
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static char ID;
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MIRNamer() : MachineFunctionPass(ID) {}
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StringRef getPassName() const override {
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return "Rename virtual register operands";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override {
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bool Changed = false;
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if (MF.empty())
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return Changed;
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VRegRenamer Renamer(MF.getRegInfo());
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unsigned BBIndex = 0;
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ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
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for (auto &MBB : RPOT)
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Changed |= Renamer.renameVRegs(MBB, BBIndex++);
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return Changed;
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}
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};
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} // end anonymous namespace
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char MIRNamer::ID;
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char &llvm::MIRNamerID = MIRNamer::ID;
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INITIALIZE_PASS_BEGIN(MIRNamer, "mir-namer", "Rename Register Operands", false,
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false)
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INITIALIZE_PASS_END(MIRNamer, "mir-namer", "Rename Register Operands", false,
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false)
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