forked from OSchip/llvm-project
63 lines
2.1 KiB
LLVM
63 lines
2.1 KiB
LLVM
; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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define void @f(i64* %a, i64 %N) {
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entry:
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br label %for
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for:
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%indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.backedge ]
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br label %S1
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S1:
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%scevgep1 = getelementptr i64, i64* %a, i64 %indvar
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%val = load i64, i64* %scevgep1, align 8
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br label %S2
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S2:
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%scevgep2 = getelementptr i64, i64* %a, i64 %indvar
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store i64 %val, i64* %scevgep2, align 8
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br label %for.backedge
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for.backedge:
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%indvar.next = add nsw i64 %indvar, 1
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%exitcond = icmp eq i64 %indvar.next, %N
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br i1 %exitcond, label %return, label %for
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return:
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ret void
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}
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; CHECK: Arrays {
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; CHECK-NEXT: i64 MemRef_a[*]; // Element size 8
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; CHECK-NEXT: i64 MemRef_val; // Element size 8
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; CHECK-NEXT: }
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;
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; CHECK: Arrays (Bounds as pw_affs) {
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; CHECK-NEXT: i64 MemRef_a[*]; // Element size 8
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; CHECK-NEXT: i64 MemRef_val; // Element size 8
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; CHECK-NEXT: }
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;
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; CHECK: Statements {
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; CHECK-NEXT: Stmt_S1
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [N] -> { Stmt_S1[i0] : 0 <= i0 < N };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [N] -> { Stmt_S1[i0] -> [i0, 0] };
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [N] -> { Stmt_S1[i0] -> MemRef_a[i0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK-NEXT: [N] -> { Stmt_S1[i0] -> MemRef_val[] };
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; CHECK-NEXT: Stmt_S2
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [N] -> { Stmt_S2[i0] : 0 <= i0 < N };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [N] -> { Stmt_S2[i0] -> [i0, 1] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [N] -> { Stmt_S2[i0] -> MemRef_a[i0] };
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK-NEXT: [N] -> { Stmt_S2[i0] -> MemRef_val[] };
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; CHECK-NEXT: }
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