llvm-project/llvm/test/MC
James Molloy 6110be9759 Re-apply r302416: [ARM] Clear the constant pool cache on explicit .ltorg directives
Re-applying now that PR32825 which was raised on the commit this fixed up is now known to have also been fixed by this commit.

Original commit message:
    Multiple ldr pseudoinstructions with the same constant value will
    reuse the same constant pool entry. However, if the constant pool
    is explicitly flushed with a .ltorg directive, we should not try
    to reference constants in the previous pool any longer, since they
    may be out of range.

    This fixes assembling hand-written assembler source which repeatedly
    loads the same constant value, across a binary size larger than the
    pc-relative fixup range for ldr instructions (4096 bytes). Such
    assembler source already uses explicit .ltorg instructions to emit
    constant pools with regular intervals. However if we try to reuse
    constants emitted in earlier pools, they end up out of range.

    This makes the output of the testcase match what binutils gas does
    (prior to this patch, it would fail to assemble).

    Differential Revision: https://reviews.llvm.org/D32847

llvm-svn: 303540
2017-05-22 09:42:07 +00:00
..
AArch64 Re-apply r286006: Fix 24560: assembler does not share constant pool for same constants 2017-05-22 09:42:01 +00:00
AMDGPU [AMDGPU][MC] Fixed bugs in export instruction 2017-05-19 13:36:09 +00:00
ARM Re-apply r302416: [ARM] Clear the constant pool cache on explicit .ltorg directives 2017-05-22 09:42:07 +00:00
AVR [AVR] Fix a bug so that we now emit R_AVR_16 fixups with the correct offset 2017-04-30 23:33:52 +00:00
AsmParser [LLVM][inline-asm] Altmacro string escape character '!' 2017-05-10 13:08:11 +00:00
COFF MC/COFF: Do not emit forward associative section referenceds. 2017-02-17 17:32:54 +00:00
Disassembler [AMDGPU][MC] Corrected disassembler to decode instructions with 2 literals 2017-05-19 14:27:52 +00:00
ELF Add llvm::object::getELFSectionTypeName(). 2017-05-02 14:04:52 +00:00
Hexagon [Hexagon] Change iconst to emit 27bit relocation 2017-05-02 18:19:11 +00:00
Lanai [lanai] Add more tests for assembly of conditional ALU ops 2016-07-11 17:58:16 +00:00
MachO MCMacho: Allow __thread_ptr section after dwarf sections 2017-02-01 01:31:36 +00:00
Markup
Mips [mips] Emit R_MICROMIPS_TLS_GOTTPREL relocation for %gottprel in case of microMIPS 2017-04-30 04:27:23 +00:00
PowerPC [PowerPC][Altivec] Add mfvrd and mffprd extended mnemonic 2017-03-15 16:04:53 +00:00
Sparc [Sparc] Remove execute permissions from non-executable text files 2017-05-17 11:05:20 +00:00
SystemZ [SystemZ] Add miscellaneous instructions 2017-05-10 14:20:15 +00:00
WebAssembly [WebAssembly] Add size of section header to data relocation offsets. 2017-04-28 21:22:38 +00:00
X86 [X86][LWP] Add llvm support for LWP instructions (reapplied). 2017-05-03 15:51:39 +00:00