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e4b4f994d2
llvm-project
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llvm
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test
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CodeGen
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Mips
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cconv
History
Simon Atanasyan
623282f0dd
[mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC
...
Support for 64-bit coprocessors on a 32-bit architecture was added in `MIPS32 R2`. llvm-svn: 365507
2019-07-09 15:48:05 +00:00
..
arguments-float.ll
…
arguments-fp128.ll
…
arguments-hard-float-varargs.ll
[mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC
2018-10-03 22:02:23 +00:00
arguments-hard-float.ll
[DAGCombiner][Mips] Don't combine bitcast+store after LegalOperations when the store is volatile, if the resulting store isn't Legal
2018-08-24 17:48:25 +00:00
arguments-hard-fp128.ll
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arguments-small-structures-bigger-than-32bits.ll
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arguments-struct.ll
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arguments-varargs-small-structs-byte.ll
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arguments-varargs-small-structs-combinations.ll
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arguments-varargs-small-structs-multiple-args.ll
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arguments-varargs.ll
[mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC
2018-10-03 22:02:23 +00:00
arguments.ll
…
byval.ll
…
callee-saved-float.ll
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callee-saved-fpxx.ll
…
callee-saved-fpxx1.ll
[mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC
2019-07-09 15:48:05 +00:00
callee-saved.ll
[mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC
2018-10-03 22:02:23 +00:00
fmaxl_call.ll
[mips] Mark fmaxl as a long double emulation routine
2018-10-12 08:18:38 +00:00
memory-layout.ll
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pr33883.ll
…
reserved-space.ll
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return-float.ll
…
return-hard-float.ll
[mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC
2019-07-09 15:48:05 +00:00
return-hard-fp128.ll
[DAGCombiner][AMDGPU][Mips] Fold bitcast with volatile loads if the resulting load is legal for the target.
2018-08-28 03:47:20 +00:00
return-hard-struct-f128.ll
[DAGCombiner][AMDGPU][Mips] Fold bitcast with volatile loads if the resulting load is legal for the target.
2018-08-28 03:47:20 +00:00
return-struct.ll
[mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC
2018-10-03 22:02:23 +00:00
return.ll
…
roundl-call.ll
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stack-alignment.ll
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vector.ll
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
2019-01-17 21:50:37 +00:00