forked from OSchip/llvm-project
33 lines
1.0 KiB
YAML
33 lines
1.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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define i32 @test_store_release_i64(i32 %a, i64* %addr) {
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ret i32 %a
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}
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...
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---
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name: test_store_release_i64
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alignment: 2
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $x1, $x2
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; CHECK-LABEL: name: test_store_release_i64
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; CHECK: liveins: $w0, $x1, $x2
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x2
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; CHECK: early-clobber %2:gpr32 = STLXRX [[COPY]], [[COPY1]]
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; CHECK: $w0 = COPY %2
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; CHECK: RET_ReallyLR implicit $w0
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%1:gpr(s64) = COPY $x1
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%2:gpr(p0) = COPY $x2
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%3:gpr(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.stlxr), %1(s64), %2(p0) :: (volatile store 8 into %ir.addr)
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$w0 = COPY %3(s32)
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RET_ReallyLR implicit $w0
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...
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