forked from OSchip/llvm-project
67 lines
2.1 KiB
YAML
67 lines
2.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-apple-darwin -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: select_f32
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alignment: 2
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $s0, $s1, $w0
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; CHECK-LABEL: name: select_f32
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; CHECK: liveins: $s0, $s1, $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s0
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; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY $s1
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; CHECK: [[COPY3:%[0-9]+]]:fpr32 = COPY [[COPY]]
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; CHECK: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY3]]
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; CHECK: $wzr = ANDSWri [[COPY4]], 0, implicit-def $nzcv
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; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[COPY2]], 1, implicit $nzcv
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; CHECK: $s0 = COPY [[FCSELSrrr]]
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; CHECK: RET_ReallyLR implicit $s0
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%3:gpr(s32) = COPY $w0
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%0:gpr(s1) = G_TRUNC %3(s32)
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%1:fpr(s32) = COPY $s0
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%2:fpr(s32) = COPY $s1
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%5:fpr(s1) = COPY %0(s1)
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%4:fpr(s32) = G_SELECT %5(s1), %1, %2
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$s0 = COPY %4(s32)
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RET_ReallyLR implicit $s0
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...
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---
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name: select_f64
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alignment: 2
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0, $d1, $w0
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; CHECK-LABEL: name: select_f64
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; CHECK: liveins: $d0, $d1, $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0
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; CHECK: [[COPY2:%[0-9]+]]:fpr64 = COPY $d1
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; CHECK: [[COPY3:%[0-9]+]]:fpr32 = COPY [[COPY]]
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; CHECK: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY3]]
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; CHECK: $wzr = ANDSWri [[COPY4]], 0, implicit-def $nzcv
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; CHECK: [[FCSELDrrr:%[0-9]+]]:fpr64 = FCSELDrrr [[COPY1]], [[COPY2]], 1, implicit $nzcv
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; CHECK: $d0 = COPY [[FCSELDrrr]]
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; CHECK: RET_ReallyLR implicit $d0
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%3:gpr(s32) = COPY $w0
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%0:gpr(s1) = G_TRUNC %3(s32)
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%1:fpr(s64) = COPY $d0
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%2:fpr(s64) = COPY $d1
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%5:fpr(s1) = COPY %0(s1)
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%4:fpr(s64) = G_SELECT %5(s1), %1, %2
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$d0 = COPY %4(s64)
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RET_ReallyLR implicit $d0
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