forked from OSchip/llvm-project
663 lines
15 KiB
YAML
663 lines
15 KiB
YAML
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
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# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -regbankselect-greedy -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=GREEDY
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--- |
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; ModuleID = 'tmp.ll'
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source_filename = "tmp.ll"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64--linux-gnu"
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define i8 @test_add_i8(i8 %arg1, i8 %arg2) {
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%ret = add i8 %arg1, %arg2
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ret i8 %ret
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}
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define i16 @test_add_i16(i16 %arg1, i16 %arg2) {
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%ret = add i16 %arg1, %arg2
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ret i16 %ret
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}
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define i32 @test_add_i32(i32 %arg1, i32 %arg2) {
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%ret = add i32 %arg1, %arg2
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ret i32 %ret
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}
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define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
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%ret = add i64 %arg1, %arg2
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ret i64 %ret
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}
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define float @test_add_float(float %arg1, float %arg2) {
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%ret = fadd float %arg1, %arg2
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ret float %ret
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}
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define double @test_add_double(double %arg1, double %arg2) {
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%ret = fadd double %arg1, %arg2
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ret double %ret
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}
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define <4 x i32> @test_add_v4i32(<4 x i32> %arg1, <4 x i32> %arg2) {
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%ret = add <4 x i32> %arg1, %arg2
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ret <4 x i32> %ret
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}
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define <4 x float> @test_add_v4f32(<4 x float> %arg1, <4 x float> %arg2) {
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%ret = fadd <4 x float> %arg1, %arg2
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ret <4 x float> %ret
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}
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define i8 @test_load_i8(i8* %p1) {
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%r = load i8, i8* %p1
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ret i8 %r
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}
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define i16 @test_load_i16(i16* %p1) {
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%r = load i16, i16* %p1
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ret i16 %r
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}
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define i32 @test_load_i32(i32* %p1) {
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%r = load i32, i32* %p1
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ret i32 %r
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}
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define i64 @test_load_i64(i64* %p1) {
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%r = load i64, i64* %p1
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ret i64 %r
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}
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define float @test_load_float(float* %p1) {
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%r = load float, float* %p1
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ret float %r
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}
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define double @test_load_double(double* %p1) {
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%r = load double, double* %p1
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ret double %r
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}
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define <4 x i32> @test_load_v4i32(<4 x i32>* %p1) {
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%r = load <4 x i32>, <4 x i32>* %p1, align 16
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ret <4 x i32> %r
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}
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define i32* @test_store_i32(i32 %val, i32* %p1) {
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store i32 %val, i32* %p1
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ret i32* %p1
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}
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define i64* @test_store_i64(i64 %val, i64* %p1) {
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store i64 %val, i64* %p1
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ret i64* %p1
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}
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define float* @test_store_float(float %val, float* %p1) {
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store float %val, float* %p1
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ret float* %p1
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}
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define double* @test_store_double(double %val, double* %p1) {
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store double %val, double* %p1
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ret double* %p1
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}
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define void @constInt_check() {
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ret void
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}
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define void @trunc_check() {
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ret void
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}
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...
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---
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name: test_add_i8
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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# CHECK-LABEL: name: test_add_i8
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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# CHECK: - { id: 2, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi, %esi
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%0(s8) = COPY %edi
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%1(s8) = COPY %esi
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%2(s8) = G_ADD %0, %1
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%al = COPY %2(s8)
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RET 0, implicit %al
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...
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---
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name: test_add_i16
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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# CHECK-LABEL: name: test_add_i16
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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# CHECK: - { id: 2, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi, %esi
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%0(s16) = COPY %edi
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%1(s16) = COPY %esi
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%2(s16) = G_ADD %0, %1
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%ax = COPY %2(s16)
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RET 0, implicit %ax
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...
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---
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name: test_add_i32
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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# CHECK-LABEL: name: test_add_i32
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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# CHECK: - { id: 2, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi, %esi
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%0(s32) = COPY %edi
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%1(s32) = COPY %esi
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%2(s32) = G_ADD %0, %1
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%eax = COPY %2(s32)
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RET 0, implicit %eax
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...
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---
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name: test_add_i64
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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# CHECK-LABEL: name: test_add_i64
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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# CHECK: - { id: 2, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi, %rsi
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%0(s64) = COPY %rdi
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%1(s64) = COPY %rsi
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%2(s64) = G_ADD %0, %1
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%rax = COPY %2(s64)
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RET 0, implicit %rax
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...
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---
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name: test_add_float
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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# CHECK-LABEL: name: test_add_float
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# CHECK: registers:
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# CHECK: - { id: 0, class: vecr }
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# CHECK: - { id: 1, class: vecr }
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# CHECK: - { id: 2, class: vecr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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%0(s32) = COPY %xmm0
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%1(s32) = COPY %xmm1
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%2(s32) = G_FADD %0, %1
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%xmm0 = COPY %2(s32)
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RET 0, implicit %xmm0
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...
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---
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name: test_add_double
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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# CHECK-LABEL: name: test_add_double
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# CHECK: registers:
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# CHECK: - { id: 0, class: vecr }
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# CHECK: - { id: 1, class: vecr }
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# CHECK: - { id: 2, class: vecr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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%0(s64) = COPY %xmm0
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%1(s64) = COPY %xmm1
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%2(s64) = G_FADD %0, %1
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%xmm0 = COPY %2(s64)
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RET 0, implicit %xmm0
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...
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---
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name: test_add_v4i32
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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# CHECK-LABEL: name: test_add_v4i32
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# CHECK: registers:
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# CHECK: - { id: 0, class: vecr }
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# CHECK: - { id: 1, class: vecr }
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# CHECK: - { id: 2, class: vecr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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%0(<4 x s32>) = COPY %xmm0
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%1(<4 x s32>) = COPY %xmm1
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%2(<4 x s32>) = G_ADD %0, %1
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%xmm0 = COPY %2(<4 x s32>)
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RET 0, implicit %xmm0
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...
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---
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name: test_add_v4f32
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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# CHECK-LABEL: name: test_add_v4f32
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# CHECK: registers:
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# CHECK: - { id: 0, class: vecr }
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# CHECK: - { id: 1, class: vecr }
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# CHECK: - { id: 2, class: vecr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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%0(<4 x s32>) = COPY %xmm0
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%1(<4 x s32>) = COPY %xmm1
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%2(<4 x s32>) = G_FADD %0, %1
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%xmm0 = COPY %2(<4 x s32>)
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RET 0, implicit %xmm0
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...
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---
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name: test_load_i8
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_load_i8
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi
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%0(p0) = COPY %rdi
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%1(s8) = G_LOAD %0(p0) :: (load 1 from %ir.p1)
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%al = COPY %1(s8)
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RET 0, implicit %al
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...
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---
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name: test_load_i16
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_load_i16
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi
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%0(p0) = COPY %rdi
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%1(s16) = G_LOAD %0(p0) :: (load 2 from %ir.p1)
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%ax = COPY %1(s16)
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RET 0, implicit %ax
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...
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---
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name: test_load_i32
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_load_i32
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi
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%0(p0) = COPY %rdi
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%1(s32) = G_LOAD %0(p0) :: (load 4 from %ir.p1)
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%eax = COPY %1(s32)
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RET 0, implicit %eax
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...
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---
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name: test_load_i64
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alignment: 4
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exposesReturnsTwice: false
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_load_i64
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi
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%0(p0) = COPY %rdi
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%1(s64) = G_LOAD %0(p0) :: (load 8 from %ir.p1)
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%rax = COPY %1(s64)
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RET 0, implicit %rax
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...
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---
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name: test_load_float
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_load_float
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi
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%0(p0) = COPY %rdi
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%1(s32) = G_LOAD %0(p0) :: (load 4 from %ir.p1)
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%xmm0 = COPY %1(s32)
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RET 0, implicit %xmm0
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...
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---
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name: test_load_double
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_load_double
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi
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%0(p0) = COPY %rdi
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%1(s64) = G_LOAD %0(p0) :: (load 8 from %ir.p1)
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%xmm0 = COPY %1(s64)
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RET 0, implicit %xmm0
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...
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---
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name: test_load_v4i32
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_load_v4i32
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: vecr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi
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%0(p0) = COPY %rdi
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%1(<4 x s32>) = G_LOAD %0(p0) :: (load 16 from %ir.p1, align 1)
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%xmm0 = COPY %1(<4 x s32>)
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RET 0, implicit %xmm0
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...
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---
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name: test_store_i32
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_store_i32
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# CHECK: registers:
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# CHECK: - { id: 0, class: gpr }
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# CHECK: - { id: 1, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi, %rsi
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%0(s32) = COPY %edi
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%1(p0) = COPY %rsi
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G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
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%rax = COPY %1(p0)
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RET 0, implicit %rax
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...
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---
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name: test_store_i64
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alignment: 4
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK-LABEL: name: test_store_i64
|
|
# CHECK: registers:
|
|
# CHECK: - { id: 0, class: gpr }
|
|
# CHECK: - { id: 1, class: gpr }
|
|
registers:
|
|
- { id: 0, class: _ }
|
|
- { id: 1, class: _ }
|
|
body: |
|
|
bb.1 (%ir-block.0):
|
|
liveins: %rdi, %rsi
|
|
|
|
%0(s64) = COPY %rdi
|
|
%1(p0) = COPY %rsi
|
|
G_STORE %0(s64), %1(p0) :: (store 8 into %ir.p1)
|
|
%rax = COPY %1(p0)
|
|
RET 0, implicit %rax
|
|
|
|
...
|
|
---
|
|
name: test_store_float
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: false
|
|
selected: false
|
|
# CHECK-LABEL: name: test_store_float
|
|
# CHECK: registers:
|
|
|
|
# FAST-NEXT: - { id: 0, class: vecr }
|
|
# FAST-NEXT: - { id: 1, class: gpr }
|
|
# FAST-NEXT: - { id: 2, class: gpr }
|
|
|
|
# GREEDY-NEXT: - { id: 0, class: vecr }
|
|
# GREEDY-NEXT: - { id: 1, class: gpr }
|
|
|
|
registers:
|
|
- { id: 0, class: _ }
|
|
- { id: 1, class: _ }
|
|
body: |
|
|
bb.1 (%ir-block.0):
|
|
liveins: %rdi, %xmm0
|
|
|
|
%0(s32) = COPY %xmm0
|
|
%1(p0) = COPY %rdi
|
|
; CHECK: %1(p0) = COPY %rdi
|
|
|
|
; FAST-NEXT: %2(s32) = COPY %0(s32)
|
|
; FAST-NEXT: G_STORE %2(s32), %1(p0) :: (store 4 into %ir.p1)
|
|
|
|
; GREEDY-NEXT: G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
|
|
|
|
G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
|
|
%rax = COPY %1(p0)
|
|
RET 0, implicit %rax
|
|
|
|
...
|
|
---
|
|
name: test_store_double
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: false
|
|
selected: false
|
|
# CHECK-LABEL: name: test_store_double
|
|
# CHECK: registers:
|
|
|
|
# FAST-NEXT: - { id: 0, class: vecr }
|
|
# FAST-NEXT: - { id: 1, class: gpr }
|
|
# FAST-NEXT: - { id: 2, class: gpr }
|
|
|
|
# GREEDY-NEXT: - { id: 0, class: vecr }
|
|
# GREEDY-NEXT: - { id: 1, class: gpr }
|
|
|
|
registers:
|
|
- { id: 0, class: _ }
|
|
- { id: 1, class: _ }
|
|
body: |
|
|
bb.1 (%ir-block.0):
|
|
liveins: %rdi, %xmm0
|
|
|
|
%0(s64) = COPY %xmm0
|
|
%1(p0) = COPY %rdi
|
|
|
|
; CHECK: %1(p0) = COPY %rdi
|
|
|
|
; FAST-NEXT: %2(s64) = COPY %0(s64)
|
|
; FAST-NEXT: G_STORE %2(s64), %1(p0) :: (store 8 into %ir.p1)
|
|
|
|
; GREEDY-NEXT: G_STORE %0(s64), %1(p0) :: (store 8 into %ir.p1)
|
|
|
|
G_STORE %0(s64), %1(p0) :: (store 8 into %ir.p1)
|
|
%rax = COPY %1(p0)
|
|
RET 0, implicit %rax
|
|
|
|
...
|
|
---
|
|
name: constInt_check
|
|
alignment: 4
|
|
legalized: true
|
|
# CHECK-LABEL: name: constInt_check
|
|
# CHECK: registers:
|
|
# CHECK-NEXT: - { id: 0, class: gpr }
|
|
# CHECK-NEXT: - { id: 1, class: gpr }
|
|
# CHECK-NEXT: - { id: 2, class: gpr }
|
|
# CHECK-NEXT: - { id: 3, class: gpr }
|
|
registers:
|
|
- { id: 0, class: _ }
|
|
- { id: 1, class: _ }
|
|
- { id: 2, class: _ }
|
|
- { id: 3, class: _ }
|
|
body: |
|
|
bb.0 (%ir-block.0):
|
|
%0(s8) = G_CONSTANT i8 8
|
|
%1(s16) = G_CONSTANT i16 16
|
|
%2(s32) = G_CONSTANT i32 32
|
|
%3(s64) = G_CONSTANT i64 64
|
|
RET 0
|
|
|
|
...
|
|
---
|
|
name: trunc_check
|
|
alignment: 4
|
|
legalized: true
|
|
# CHECK-LABEL: name: trunc_check
|
|
# CHECK: registers:
|
|
# CHECK-NEXT: - { id: 0, class: gpr }
|
|
# CHECK-NEXT: - { id: 1, class: gpr }
|
|
# CHECK-NEXT: - { id: 2, class: gpr }
|
|
# CHECK-NEXT: - { id: 3, class: gpr }
|
|
registers:
|
|
- { id: 0, class: _ }
|
|
- { id: 1, class: _ }
|
|
- { id: 2, class: _ }
|
|
- { id: 3, class: _ }
|
|
body: |
|
|
bb.0 (%ir-block.0):
|
|
%0(s32) = IMPLICIT_DEF
|
|
%1(s1) = G_TRUNC %0(s32)
|
|
%2(s8) = G_TRUNC %0(s32)
|
|
%3(s16) = G_TRUNC %0(s32)
|
|
RET 0
|
|
|
|
...
|