llvm-project/llvm/test/CodeGen/MIR
Quentin Colombet 81551148b7 [RegAllocFast] Add the proper initialize method to use the .mir infrastructure
NFC

llvm-svn: 307427
2017-07-07 19:25:42 +00:00
..
AArch64 [Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default. 2017-06-06 08:16:19 +00:00
AMDGPU AMDGPU: Add operand target flags serialization 2017-07-02 23:21:48 +00:00
ARM Revert "[IfConversion] Keep the CFG updated incrementally in IfConvertTriangle" 2017-05-29 06:12:18 +00:00
Generic [RegAllocFast] Add the proper initialize method to use the .mir infrastructure 2017-07-07 19:25:42 +00:00
Hexagon Move .mir tests to appropriate directories 2016-12-09 19:08:15 +00:00
Mips MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
NVPTX llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
PowerPC MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
X86 [MachineVerifier] Add check that tied physregs aren't different. 2017-07-06 13:18:21 +00:00
README Add README describing the intention of test/CodeGen/MIR 2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.