llvm-project/llvm/lib/CodeGen/GlobalISel
Juneyoung Lee 5cdf6ed744 [CodeGen] recognize select form of and/ors when splitting branch conditions
Recently a few patches are made to move towards using select i1 instead of and/or i1 to represent "a && b"/"a || b" in C/C++.
"a && b" in C/C++ does not evaluate b if a is false whereas 'and a, b' in IR evaluates b and uses its result regardless of the result of a.
This is problematic because it can cause miscompilation if b was an erroneous operation (https://llvm.org/pr48353).
In C/C++, the result is simply false because b is not evaluated, but in IR the result is poison.
The discussion at D93065 has more context about this.

This patch makes two branch-splitting optimizations (one in SelectionDAGBuilder, one in CodeGenPrepare) recognize
select form of and/or as well using m_LogicalAnd/Or.
Since it is CodeGen, I think this is semantically ok (at least as safe as what codegen already did).

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D93853
2021-01-01 04:46:10 +09:00
..
CMakeLists.txt llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
CSEInfo.cpp [GISel]: Fix one more CSE Non determinism 2020-08-27 09:06:21 -07:00
CSEMIRBuilder.cpp [GlobalISel] Fix CSEMIRBuilder silently allowing use-before-def. 2020-10-05 11:00:00 -07:00
CallLowering.cpp GlobalISel: Fix generic handling of single outgoing call arguments 2020-12-15 17:00:27 -05:00
Combiner.cpp [GlobalISel] fix a compilation error with gcc 6.3.0 2020-08-28 09:16:52 -07:00
CombinerHelper.cpp [GlobalISel] Fix assertion failures after "GlobalISel: Return APInt from getConstantVRegVal" landed. 2020-12-26 23:51:44 -08:00
GISelChangeObserver.cpp GlobalISel: Use Register 2020-08-19 13:45:31 -04:00
GISelKnownBits.cpp [KnownBits] Add KnownBits::commonBits helper. NFCI. 2020-11-11 12:15:54 +00:00
GlobalISel.cpp
IRTranslator.cpp [CodeGen] recognize select form of and/ors when splitting branch conditions 2021-01-01 04:46:10 +09:00
InlineAsmLowering.cpp [GlobalISel][InlineAsm] Fix matching input constraint to physreg 2020-08-06 14:35:51 +02:00
InstructionSelect.cpp GlobalISel: Move finalizeLowering call later 2020-07-06 09:19:40 -04:00
InstructionSelector.cpp GlobalISel: Return APInt from getConstantVRegVal 2020-12-22 22:23:58 -05:00
LegalityPredicates.cpp [CodeGen, Transforms] Use llvm::any_of (NFC) 2020-12-24 09:08:36 -08:00
LegalizeMutations.cpp GlobalISel: Add scalarSameSizeAs LegalizeRule 2020-07-23 21:17:31 -04:00
Legalizer.cpp GlobalISel: Improve dead instruction debug printing 2020-08-24 10:12:00 -04:00
LegalizerHelper.cpp [AArch64][GlobalISel] Fix crash during legalization of a vector G_SELECT with scalar mask. 2020-11-30 16:37:49 -08:00
LegalizerInfo.cpp GlobalISel: Assert if MoreElements uses a non-vector type 2020-09-30 10:36:00 -04:00
Localizer.cpp Revert "Revert "[GlobalISel][Localizer] Enable intra-block localization of already-local uses."" 2020-03-06 21:35:08 -08:00
LostDebugLocObserver.cpp Give helpers internal linkage. NFC. 2020-04-25 11:50:52 +02:00
MachineIRBuilder.cpp [GlobalISel] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds 2020-11-30 18:31:42 -08:00
RegBankSelect.cpp [GlobalISel][InlineAsm] Add support for basic output operand constraints 2020-05-06 10:06:13 +02:00
RegisterBank.cpp Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes" 2020-03-20 11:02:50 +01:00
RegisterBankInfo.cpp Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes" 2020-03-20 11:02:50 +01:00
Utils.cpp GlobalISel: Return APInt from getConstantVRegVal 2020-12-22 22:23:58 -05:00