llvm-project/llvm/test/CodeGen/Thumb
Kees Cook c2187c20a4 [TargetLowering] Extend bool args to inline-asm according to getBooleanType
Summary:
This extends Krzysztof Parzyszek's X86-specific solution
(https://reviews.llvm.org/D60208) to the generic code pointed out by
James Y Knight.

Reviewers: kparzysz, craig.topper, nickdesaulniers

Subscribers: efriedma, sdardis, nemanjai, javed.absar, eraman, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, llvm-commits, srhines, void, nickdesaulniers, jyknight

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60224

llvm-svn: 361404
2019-05-22 16:16:15 +00:00
..
2007-01-31-RegInfoAssert.ll
2007-02-02-JoinIntervalsCrash.ll
2007-05-05-InvalidPushPop.ll
2009-06-18-ThumbCommuteMul.ll
2009-07-20-TwoAddrBug.ll
2009-07-27-PEIAssert.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
2009-08-12-ConstIslandAssert.ll
2009-08-12-RegInfoAssert.ll
2009-08-20-ISelBug.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
2009-12-17-pre-regalloc-taildup.ll
2010-06-18-SibCallCrash.ll
2010-07-01-FuncAlign.ll
2010-07-15-debugOrdering.ll In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled. 2017-03-14 00:34:14 +00:00
2011-05-11-DAGLegalizer.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
2011-06-16-NoGPRs.ll
2011-EpilogueBug.ll
2012-04-26-M0ISelBug.ll
2014-06-10-thumb1-ldst-opt-bug.ll
DbgValueOtherTargets.test
PR17309.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
PR35481.ll [ARM] Fix PR35481 2018-01-08 11:32:37 +00:00
PR36658.mir [ARM] Fix "Constant pool entry out of range!" in Thumb1 mode 2018-03-23 17:53:27 +00:00
addr-modes.ll CodeGenPrep: preserve inbounds attribute when sinking GEPs. 2019-03-12 15:22:23 +00:00
and_neg.ll
asmprinter-bug.ll
barrier.ll
bic_imm.ll [ARM] Adjust AND immediates to make them cheaper to select. 2018-08-10 21:21:53 +00:00
branchless-cmp.ll [SelectionDAG] swap select_cc operands to enable folding 2018-11-09 11:09:40 +00:00
callee_save.ll
cmp-add-fold.ll
cmp-fold.ll
constants.ll [ARM] Materialise some boolean values to avoid a branch 2018-02-16 09:23:59 +00:00
consthoist-few-dependents.ll [ARM] Make InstrEmitter mark CPSR defs dead for Thumb1. 2018-10-26 19:32:24 +00:00
consthoist-imm8-costs-1.ll [Thumb1] Any imm8 should have cost of 1 2018-09-24 16:15:23 +00:00
consthoist-physical-addr.ll [ARM] Add an extra constant hoisting test. NFC 2019-04-10 18:05:57 +00:00
copy_thumb.ll In Thumb1, materialize a move between low registers as a `movs`, if CPSR isn't live. 2017-03-07 09:38:16 +00:00
cortex-m0-unaligned-access.ll
dyn-stackalloc.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
fastcc.ll
fpconv.ll
fpow.ll
frame-access.ll [ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1. 2019-03-20 19:40:45 +00:00
frame_thumb.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
i8-phi-ext.ll [CodeGen] Emit more precise AssertZext/AssertSext nodes. 2018-07-11 23:26:35 +00:00
iabs-vector.ll [Thumb] Fix infinite loop in ABS expansion (PR41160) 2019-03-21 12:41:18 +00:00
iabs.ll [Thumb] Add some integer abs testcases for different typesizes. 2019-03-01 12:08:50 +00:00
inline-asm-i-constraint-i1.ll [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
inlineasm-imm-thumb.ll
inlineasm-thumb.ll
ispositive.ll [ARM] t2_so_imm_neg had a subtle bug in the conversion, and could trigger UB by negating (int)-2147483648. By pure luck, none of the pre-existing tests triggered this; so I'm adding one. 2017-03-22 15:09:30 +00:00
large-fn-switch.ll [ARM] Make sure to save/restore LR when we use tBfar. 2019-03-19 21:48:08 +00:00
large-stack.ll [ARM] Dynamic stack alignment for 16-bit Thumb 2017-10-22 11:56:35 +00:00
ldm-merge-call.ll
ldm-merge-struct.ll
ldm-stm-base-materialization-thumb2.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
ldm-stm-base-materialization.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
ldm-stm-postinc.ll
ldr_ext.ll
ldr_frame.ll
lit.local.cfg
litpoolremat.ll [ARM] Allow rematerialization of ARM Thumb literal pool loads 2017-07-14 08:23:56 +00:00
long-setcc.ll [ARM] Add missing pseudo-instruction for Thumb1 RSBS. 2018-10-31 21:45:48 +00:00
long.ll [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
long_shift.ll
machine-cse-deadreg.mir [Codegen] Remove dead flags on Physical Defs in machine cse 2019-02-20 10:22:18 +00:00
machine-cse-physreg.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
mature-mc-support.ll
mul.ll
mvn.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
opt-phis.mir [Codegen] Make sure kill flags are not incorrect from removed machine phi's 2019-02-12 15:02:57 +00:00
optionaldef-scheduling.ll [ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs 2017-04-23 06:58:08 +00:00
peephole-cmp.mir [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs 2019-02-22 12:23:31 +00:00
peephole-mi.mir [ARM] Add some more missing T1 opcodes for the peephole optimisier 2019-02-25 15:50:54 +00:00
pop.ll
pr35836.ll Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-27 16:59:10 +00:00
pr35836_2.ll [ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1. 2019-03-20 19:40:45 +00:00
push.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
ragreedy-implicit-def.ll [RegAllocGreedy] IMPLICIT_DEF values shouldn't prefer registers 2018-12-14 14:07:57 +00:00
remove-unneeded-push-pop.ll
rev.ll
segmented-stacks-dynamic.ll
segmented-stacks.ll
select.ll [ARM] Fix CPSR liveness in tMOVCCr_pseudo lowering. 2018-11-07 21:08:13 +00:00
shift-and.ll [ARM] Combine ands+lsls to lsls+lsrs for Thumb1. 2019-01-22 01:51:37 +00:00
sjljehprepare-lower-vector.ll
stack-access.ll Elide stores which are overwritten without being observed. 2017-05-16 19:43:56 +00:00
stack-coloring-without-frame-ptr.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
stack-frame.ll
stack_guard_remat.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
stm-deprecated.ll [ARM] Don't generate deprecated T1 STM. 2017-02-28 23:32:55 +00:00
stm-merge.ll
stm-scavenging.ll [LivePhysRegs] Fix handling of return instructions. 2018-02-06 23:00:17 +00:00
tbb-reuse.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
thumb-imm.ll
thumb-ldm.ll
thumb-shrink-wrapping.ll [ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1. 2019-03-20 19:40:45 +00:00
thumb1-cmp.ll [ARM] Testcase for Thumb1 cmp with constants. 2018-06-19 00:12:13 +00:00
trap.ll
triple.ll
tst_teq.ll
umulo-32-legalisation-lowering.ll [ARM] Optimize expressions like "return x != 0;" for Thumb1. 2019-04-02 00:01:23 +00:00
umulo-128-legalisation-lowering.ll [ARM] Optimize expressions like "return x != 0;" for Thumb1. 2019-04-02 00:01:23 +00:00
unord.ll
uxth.ll [ARM] Mark 255 and 65535 as cheap for Thumb1 "And" 2019-02-04 11:58:48 +00:00
vargs.ll