llvm-project/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser reports an error when an instruction
# is missing one of its implicit register operands.
--- |
define i32 @foo(i32* %p) {
entry:
%a = load i32, i32* %p
%0 = icmp sle i32 %a, 10
br i1 %0, label %less, label %exit
less:
ret i32 0
exit:
ret i32 %a
}
...
---
name: foo
body: |
bb.0.entry:
successors: %bb.1.less, %bb.2.exit
$eax = MOV32rm $rdi, 1, _, 0, _
CMP32ri8 $eax, 10, implicit-def $eflags
; CHECK: [[@LINE+1]]:25: missing implicit register operand 'implicit $eflags'
JCC_1 %bb.2.exit, 15
bb.1.less:
$eax = MOV32r0 implicit-def $eflags
bb.2.exit:
RETQ $eax
...