llvm-project/llvm/test/CodeGen/AVR
Jim Lin da0fe5db99 [AVR] Fix codegen for rotate instructions
Summary:
    This patch introduces the ROLBRd and RORBRd pseudo-instructions,
    which implemenent the "traditional" rotate operations; instead of
    the AVR rotate instructions that use the carry bit.

    The code is not optimized at all. Especially when dealing with
    loops of rotate instructions, this codegen should be improved some
    day.

Related bug: 41358 <https://bugs.llvm.org/show_bug.cgi?id=41358>

//Note//: This is my first submitted patch.

Reviewers: dylanmckay, Jim

Reviewed By: dylanmckay

Subscribers: hiraditya, llvm-commits, dylanmckay, dsprenkels

Tags: #llvm

Patched by dsprenkels (Daan Sprenkels)

Differential Revision: https://reviews.llvm.org/D60365
2019-12-23 11:41:28 +08:00
..
atomics [AVR] Fix codegen bug in 16-bit loads 2019-01-20 03:41:08 +00:00
calling-conv/c [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
features [AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests 2019-06-12 08:31:07 +00:00
inline-asm
integration [AVR] Update integration/blink.ll as we now generate sbi/cbi instructions. 2019-01-03 21:25:39 +00:00
intrinsics
pseudo [AVR] Fix incorrect source regclass of LDWRdPtr 2019-06-03 02:31:07 +00:00
relax-mem
PR31344.ll
PR31345.ll
PR37143.ll [AVR] Disable register coalescing to the PTRDISPREGS class 2019-06-01 12:38:56 +00:00
add.ll
alloca.ll
and.ll
avr-rust-issue-123.ll [AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough 2019-01-21 04:32:02 +00:00
branch-relaxation-long.ll
branch-relaxation.ll
brind.ll
call.ll [AVR] Fix the 'call.ll' CodeGen test 2018-10-10 03:21:42 +00:00
clear-bss.ll
cmp.ll
com.ll
copy-data-to-ram.ll
ctlz.ll
ctpop.ll
cttz.ll
directmem.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
div.ll
dynalloca.ll
eor.ll
expand-integer-failure.ll
frame.ll
frmidx-iterator-bug.ll
hardware-mul.ll [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL 2019-01-18 06:10:41 +00:00
high-pressure-on-ptrregs.ll
icall-func-pointer-correct-addr-space.ll
impossible-reg-to-reg-copy.ll
interrupts.ll
io.ll
issue-cannot-select-bswap.ll
issue-regalloc-stackframe-folding-earlyclobber.ll
large-return-size.ll
lit.local.cfg [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
load.ll [AVR] Fix the 'load.ll' test after r362351 2019-06-06 08:06:50 +00:00
lower-formal-args-struct-return.ll
lower-formal-arguments-assertion.ll
neg.ll
no-print-operand-twice.ll
or.ll
pre-schedule.ll [ScheduleDAGRRList] Do not preschedule the node has ADJCALLSTACKDOWN parent 2019-01-18 08:36:06 +00:00
progmem-extended.ll
progmem.ll
rem.ll
return.ll
rot.ll [AVR] Fix codegen for rotate instructions 2019-12-23 11:41:28 +08:00
runtime-trig.ll
rust-avr-bug-37.ll [AVR] Disallow the LDDWRdPtrQ instruction with Z as the destination 2018-11-05 05:00:44 +00:00
rust-avr-bug-95.ll [AVR] Disallow the LDDWRdPtrQ instruction with Z as the destination 2018-11-05 05:00:44 +00:00
rust-avr-bug-99.ll
rust-avr-bug-112.ll [AVR] Fix a backend bug that left extraneous operands after expansion 2018-11-05 05:49:04 +00:00
select-must-add-unconditional-jump.ll [AVR] Fix tests after r363757 2019-07-04 06:12:47 +00:00
sext.ll
shift.ll
sign-extension.ll
smul-with-overflow.ll [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL 2019-01-18 06:10:41 +00:00
software-mul.ll [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL 2019-01-18 06:10:41 +00:00
std-ldd-immediate-overflow.ll
store-undef.ll
store.ll [AVR] Disable register coalescing to the PTRDISPREGS class 2019-06-01 12:38:56 +00:00
sub.ll
trunc.ll
umul-with-overflow.ll [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL 2019-01-18 06:10:41 +00:00
umul.with.overflow.i16-bug.ll Add TargetLoweringInfo hook for explicitly setting the ABI calling convention endianess 2019-05-21 06:38:02 +00:00
unaligned-atomic-loads.ll
varargs.ll
xor.ll
zext.ll