llvm-project/llvm/test/MC/Disassembler/X86
Douglas Katzman 289ec857d2 [X86]: Correctly sign-extend 16-bit immediate in CALL instruction.
Patch by Matthew Barney. Thanks!

Differential Revision: http://reviews.llvm.org/D9514

llvm-svn: 240795
2015-06-26 16:58:59 +00:00
..
avx-512.txt AVX-512: Added all forms of FP compare instructions for KNL and SKX. 2015-05-07 11:24:42 +00:00
fp-stack.txt
hex-immediates.txt llvm-mc: Add option for prefering hex format disassembly. 2014-06-11 20:26:40 +00:00
intel-syntax-32.txt [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized. 2015-01-08 07:41:30 +00:00
intel-syntax.txt [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized. 2015-01-08 07:41:30 +00:00
invalid-VEX-vvvv.txt
lit.local.cfg Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
marked-up.txt
missing-sib.txt Test case for r204305. 2014-03-20 06:45:10 +00:00
moffs.txt [X86] Make the instructions that use AdSize16/32/64 co-exist together without using mode predicates. 2015-01-02 07:02:25 +00:00
padlock.txt Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. 2014-02-19 05:34:21 +00:00
prefixes.txt [X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present. 2015-01-03 00:00:20 +00:00
simple-tests.txt [X86] Add support for parsing and printing the mnemonic aliases for the XOP VPCOM instructions. 2015-02-13 07:42:25 +00:00
truncated-input.txt
x86-16.txt [X86]: Correctly sign-extend 16-bit immediate in CALL instruction. 2015-06-26 16:58:59 +00:00
x86-32.txt [X86]: Correctly sign-extend 16-bit immediate in CALL instruction. 2015-06-26 16:58:59 +00:00
x86-64.txt [X86]: Correctly sign-extend 16-bit immediate in CALL instruction. 2015-06-26 16:58:59 +00:00